I � C Bus Sta�T Signal; Slave Add�Ess; I � C Bus Read/W�Ite Signal; I � C Bus Slave Add�Ess Acknowledge Signal - Holtek HT66F20-1 Manual

HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
Flash MCU with EEPROM
I C Bus Start Signal
2
The START signal can only be generated by the master device connected to the I
the slave device. This START signal will be detected by all devices connected to the I
detected, this indicates that the I
condition occurs when a high to low transition on the SDA line takes place when the SCL line
remains high.
Slave Address
The transmission of a START signal by the master will be detected by all devices on the I
To determine which slave device the master wishes to communicate with, the address of the slave
device will be sent out immediately following the START signal. All slave devices, after receiving
this 7-bit address data, will compare it with their own 7-bit slave address. If the address sent out by
the master matches the internal address of the microcontroller slave device, then an internal I
interrupt signal will be generated. The next bit following the address, which is the 8th bit, defines
the read/write status and will be saved to the SRW bit of the SIMC1 register. The slave device will
then transmit an acknowledge bit, which is a low level, as the 9th bit. The slave device will also set
the status flag HAAS when the addresses match.
As an I C bus interrupt can come from two sources, when the program enters the interrupt
2
subroutine, the HAAS bit should be examined to see whether the interrupt source has come from
a matching slave address or from the completion of a data byte transfer. When a slave address is
matched, the devices must be placed in either the transmit mode and then write data to the SIMD
register, or in the receive mode where it must implement a dummy read from the SIMD register to
release the SCL line.
I C Bus Read/Write Signal
2
The SRW bit in the SIMC1 register defines whether the slave device wishes to read data from the
I C bus or write data to the I
2
be a transmitter or a receiver. If the SRW flag is "1" then this indicates that the master device wishes
to read data from the I
a transmitter. If the SRW flag is "0" then this indicates that the master wishes to send data to the I
bus, therefore the slave device must be setup to read data from the I
I C Bus Slave Address Acknowledge Signal
2
After the master has transmitted a calling address, any slave device on the I
own internal address matches the calling address, must generate an acknowledge signal. The
acknowledge signal will inform the master that a slave device has accepted its calling address. If no
acknowledge signal is received by the master then a STOP signal must be transmitted by the master
to end the communication. When the HAAS flag is high, the addresses have matched and the slave
device must check the SRW flag to determine if it is to be a transmitter or a receiver. If the SRW flag
is high, the slave device should be setup to be a transmitter so the HTX bit in the SIMC1 register
should be set to "1". If the SRW flag is low, then the microcontroller slave device should be setup as
a receiver and the HTX bit in the SIMC1 register should be set to "0".
Rev. 1.40
C bus is busy and therefore the HBB bit will be set. A START
2
C bus. The slave device should examine this bit to determine if it is to
2
C bus, therefore the slave device must be setup to send data to the I
2
157
C bus and not by
2
C bus. When
2
C bus.
2
C bus
2
C bus as
2
2
C bus as a receiver.
2
C bus, whose
2
�ove��e� ��� �01�
C