Holtek HT66F20-1 Manual page 66

HT66F30-1 Register
Reset
Register
(Power-on)
MP0 x x x x x x x x
MP1 x x x x x x x x
BP - - - - - - - 0
ACC x x x x x x x x
PCL 0 0 0 0 0 0 0 0
TBLP x x x x x x x x
TBLH x x x x x x x x
TBHP - - - - - x x x
STATUS - - 0 0 x x x x
SMOD 0 0 0 0 0 0 11
LVDC - - 0 0 - 0 0 0
I�TEG - - - - 0 0 0 0
WDTC 0 1 1 1 1 0 1 0
TBC 0 0 1 1 0 1 1 1
I�TC0 - 0 0 0 0 0 0 0
I�TC1 0 0 0 0 0 0 0 0
I�TC� 0 0 0 0 0 0 0 0
MFI0 - - 0 0 - - 0 0
MFI1 - 0 0 0 - 0 0 0
MFI� 0 0 0 0 0 0 0 0
PAWU 0 0 0 0 0 0 0 0
PAPU 0 0 0 0 0 0 0 0
PA 1 1 1 1 1 1 1 1
PAC 1 1 1 1 1 1 1 1
PBPU - - 0 0 0 0 0 0
PB - - 1 1 1 1 1 1
PBC - - 1 1 1 1 1 1
PCPU 0 0 0 0 0 0 0 0
PC 1 1 1 1 1 1 1 1
PCC 1 1 1 1 1 1 1 1
ADRL(ADREF=0) x x x x - - - -
ADRL(ADREF=1) x x x x x x x x
ADRH(ADREF=0) x x x x x x x x
ADRH(ADREF=1) - - - - x x x x
ADCR0 0 1 1 0 - 0 0 0
ADCR1 0 0 - 0 - 0 0 0
ACERL 1 1 1 1 1 1 1 1
CP0C 1 0 0 0 0 - - 1
CP1C 1 0 0 0 0 - - 1
SIMC0 1 1 1 0 0 0 0 -
SIMC1 1 0 0 0 0 0 0 1
SIMD x x x x x x x x
SIMA/SIMC� 0 0 0 0 0 0 0 0
TM0C0 0 0 0 0 0 0 0 0
TM0C1 0 0 0 0 0 0 0 0
TM0DL 0 0 0 0 0 0 0 0
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
Flash MCU with EEPROM
RES or WDT Time-out
LVR Reset (Normal Operation)
x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x
- - - - - - - 0 - - - - - - - 0
u u u u u u u u u u u u u u u u
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
u u u u u u u u u u u u u u u u
u u u u u u u u u u u u u u u u
- - - - - u u u - - - - - u u u
- - u u u u u u - - 1 u u u u u
0 0 0 0 0 0 11 0 0 0 0 0 0 11
- - 0 0 - 0 0 0 - - 0 0 - 0 0 0
- - - - 0 0 0 0 - - - - 0 0 0 0
0 1 1 1 1 0 1 0 0 1 1 1 1 0 1 0
0 0 1 1 0 1 1 1 0 0 1 1 0 1 1 1
- 0 0 0 0 0 0 0 - 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- - 0 0 - - 0 0 - - 0 0 - - 0 0
- 0 0 0 - 0 0 0 - 0 0 0 - 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
- - 0 0 0 0 0 0 - - 0 0 0 0 0 0
- - 1 1 1 1 1 1 - - 1 1 1 1 1 1
- - 1 1 1 1 1 1 - - 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
x x x x - - - - x x x x - - - -
x x x x x x x x x x x x x x x x
x x x x x x x x x x x x x x x x
- - - - x x x x - - - - x x x x
0 1 1 0 - 0 0 0 0 1 1 0 - 0 0 0
0 0 - 0 - 0 0 0 0 0 - 0 - 0 0 0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 0 0 0 0 - - 1 1 0 0 0 0 - - 1
1 0 0 0 0 - - 1 1 0 0 0 0 - - 1
1 1 1 0 0 0 0 - 1 1 1 0 0 0 0 -
1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1
x x x x x x x x x x x x x x x x
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
��
WDT Time-out
(IDLE)
u u u u u u u u
u u u u u u u u
- - - - - - - u
u u u u u u u u
0 0 0 0 0 0 0 0
u u u u u u u u
u u u u u u u u
- - - - - u u u
- - 1 1 u u u u
u u u u u u u u
- - u u - u u u
- - - - u u u u
u u u u u u u u
u u u u u u u u
- u u u u u u u
u u u u u u u u
u u u u u u u u
- - u u - - u u
- u u u - u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
- - u u u u u u
- - u u u u u u
- - u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u - - - -
u u u u u u u u
u u u u u u u u
- - - - u u u u
u u u u - u u u
u u - u - u u u
u u u u u u u u
u u u u u - - u
u u u u u - - u
u u u u u u u -
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
u u u u u u u u
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