Single Pulse Output Mode - Holtek HT66F20-1 Manual

Single Pulse Output Mode

To select this mode, the required bit pairs, T1AM1, T1AM0 and T1BM1, T1BM0 should be set to
10 respectively and also the corresponding T1AIO1, T1AIO0 and T1BIO1, T1BIO0 bits should be
set to 11 respectively. The Single Pulse Output Mode, as the name suggests, will generate a single
shot pulse on the TM output pin.
The trigger for the pulse TP1A output leading edge is a low to high transition of the T1ON bit, which
can be implemented using the application program. The trigger for the pulse TP1B output leading
edge is a compare match from Comparator B, which can be implemented using the application
program. However in the Single Pulse Mode, the T1ON bit can also be made to automatically
change from low to high using the external TCK1 pin, which will in turn initiate the Single Pulse
output of TP1A. When the T1ON bit transitions to a high level, the counter will start running and
the pulse leading edge of TP1A will be generated. The T1ON bit should remain high when the pulse
is in its active state. The generated pulse trailing edge of TP1A and TP1B will be generated when
the T1ON bit is cleared to zero, which can be implemented using the application program or when a
compare match occurs from Comparator A.
However a compare match from Comparator A will also automatically clear the T1ON bit and thus
generate the Single Pulse output trailing edge of TP1A and TP1B. In this way the CCRA value can
be used to control the pulse width of TP1A. The CCRA-CCRB value can be used to control the
pulse width of TP1B. A compare match from Comparator A and Comparator B will also generate
TM interrupts. The counter can only be reset back to zero when the T1ON bit changes from low to
high when the counter restarts. In the Single Pulse Mode CCRP is not used. The T1CCLR bit is also
not used.
S/W Co��and
SET"TnO�"
TPnA Output Pin
TPnB Output Pin
CCRB Co�pa�e
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
Counte� Value
CCRA
CCRB
0
CCRA
Leading Edge
TnO� �it
o�
0 → 1
TCKn Pin
T�ansition
TnO� = 1
Match
CCRB
Leading Edge
Single Pulse Generation (n=1)
1��
Flash MCU with EEPROM
Ti�e
CCRA
T�ailing Edge
S/W Co��and
CLR"TnO�"
TnO� �it
o�
1 → 0
CCRA Co�pa�e
Match
Pulse Width = CCRA Value
Pulse Width = (CCRA-CCRB) Value
S/W Co��and
CLR"TnO�"
TnO� �it
o�
1 → 0
CCRA Co�pa�e
Match
CCRB
T�ailing Edge
�ove��e� ��� �01�