Input/Output Ports; I/O Po�T Registe� List - Holtek HT66F20-1 Manual

HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
Flash MCU with EEPROM

Input/Output Ports

Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output
designation of every pin fully under user program control, pull-high selections for all ports and
wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a
wide range of application possibilities.
These devices provide bidirectional input/output lines labeled with port names PA~PC These I/O
ports are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose
Data Memory table. All of these I/O ports can be used for input and output operations. For input
operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge
of instruction "MOV A, [m]", where m denotes the port address. For output operation, all the data is
latched and remains unchanged until the output latch is rewritten.
I/O Port Register List
HT66F20-1/HT68F20-1 Register
Register
Name
7
PAWU PAWU7 PAWU �
PAPU PAPU7 PAPU�
PA PA7 PA�
PAC PAC7 PAC�
PBPU ―
PB —
PBC —
PCPU —
PC —
PCC —
HT66F30-1/HT68F30-1 Register
Register
Name
7
PAWU PAWU7 PAWU �
PAPU PAPU7 PAPU�
PA PA7 PA�
PAC PAC7 PAC�
PBPU —
PB —
PBC —
PCPU PCPU7 PCPU�
PC PC7 PC�
PCC PCC7 PCC�
Rev. 1.40
6 5 4
PAWU5 PAWU4
PAPU5 PAPU4
PA5 PA4
PAC5 PAC4
― PBPU5 PBPU4
— PB5 PB4
— PBC5 PBC4
— — —
— — —
— — —
6 5 4
PAWU5 PAWU4
PAPU5 PAPU4
PA5 PA4
PAC5 PAC4
— PBPU5 PBPU4
— PB5 PB4
— PBC5 PBC4
PCPU5 PCPU4
PC5 PC4
PCC5 PCC4
71
Bit
3 2
PAWU� PAWU� PAWU1
PAPU� PAPU� PAPU1
PA� PA�
PAC� PAC� PAC1
PBPU� PBPU� PBPU1
PB� PB�
PBC� PBC� PBC1
PCPU� PCPU� PCPU1
PC� PC�
PCC� PCC� PCC1
Bit
3 2
PAWU� PAWU� PAWU1
PAPU� PAPU� PAPU1
PA� PA�
PAC� PAC� PAC1
PBPU� PBPU� PBPU1
PB� PB�
PBC� PBC� PBC1
PCPU� PCPU� PCPU1
PC� PC�
PCC� PCC� PCC1
1 0
PAWU0
PAPU0
PA1 PA0
PAC0
PBPU0
PB1 PB0
PBC0
PCPU0
PC1 PC0
PCC0
1 0
PAWU0
PAPU0
PA1 PA0
PAC0
PBPU0
PB1 PB0
PBC0
PCPU0
PC1 PC0
PCC0
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