Standa�D Type Tm Ope�Ating Modes; Co�Pa�E Match Output Mode - Holtek HT66F20-1 Manual

Standard Type TM Operating Modes
The Standard Type TM can operate in one of five operating modes, Compare Match Output Mode,
PWM Output Mode, Single Pulse Output Mode, Capture Input Mode or Timer/Counter Mode. The
operating mode is selected using the T1M1 and T1M0 bits in the TM1C1 register.
Compare Match Output Mode
To select this mode, bits T1M1 and T1M0 in the TM1C1 register, should be set to 00 respectively.
In this mode once the counter is enabled and running it can be cleared by three methods. These are
a counter overflow, a compare match from Comparator A and a compare match from Comparator P.
When the T1CCLR bit is low, there are two ways in which the counter can be cleared. One is when
a compare match from Comparator P, the other is when the CCRP bits are all zero which allows
the counter to overflow. Here both T1AF and T1PF interrupt request flags for Comparator A and
Comparator P respectively, will both be generated.
If the T1CCLR bit in the TM1C1 register is high then the counter will be cleared when a compare
match occurs from Comparator A. However, here only the T1AF interrupt request flag will be
generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when
T1CCLR is high no T1PF interrupt request flag will be generated. In the Compare Match Output
Mode, the CCRA can not be set to "0".
As the name of the mode suggests, after a comparison is made, the TM output pin, will change
state. The TM output pin condition however only changes state when an T1AF interrupt request
flag is generated after a compare match occurs from Comparator A. The T1PF interrupt request flag,
generated from a compare match occurs from Comparator P, will have no effect on the TM output
pin. The way in which the TM output pin changes state are determined by the condition of the
T1IO1 and T1IO0 bits in the TM1C1 register. The TM output pin can be selected using the T1IO1
and T1IO0 bits to go high, to go low or to toggle from its present condition when a compare match
occurs from Comparator A. The initial condition of the TM output pin, which is setup after the
T1ON bit changes from low to high, is setup using the T1OC bit. Note that if the T1IO1 and T1IO0
bits are zero then no pin change will take place.
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
Flash MCU with EEPROM
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