Ope�Ating Mode Switching - Holtek HT66F20-1 Manual

Operating Mode Switching
These devices can switch between operating modes dynamically allowing the user to select the best
performance/power ratio for the present task in hand. In this way microcontroller operations that
do not require high performance can be executed using slower clocks thus requiring less operating
current and prolonging battery life in portable applications.
In simple terms, Mode Switching between the NORMAL Mode and SLOW Mode is executed
using the HLCLK bit and CKS2~CKS0 bits in the SMOD register while Mode Switching from the
NORMAL/SLOW Modes to the SLEEP/IDLE Modes is executed via the HALT instruction. When
a HALT instruction is executed, whether these devices enter the IDLE Mode or the SLEEP Mode
is determined by the condition of the IDLEN bit in the SMOD register and FSYSON in the WDTC
register.
When the HLCLK bit switches to a low level, which implies that clock source is switched from the
high speed clock source, f
speed clock source will stop running to conserve power. When this happens it must be noted that the
f /16 and f /64 internal clock sources will also stop running, which may affect the operation of other
H H
internal functions such as the TMs and the SIM. The accompanying flowchart shows what happens
when these devices move between the various operating modes.
NORMAL Mode to SLOW Mode Switching
When running in the NORMAL Mode, which uses the high speed system oscillator, and therefore
consumes more power, the system clock can switch to run in the SLOW Mode by set the HLCLK bit
to "0" and set the CKS2~CKS0 bits to "000" or "001" in the SMOD register. This will then use the
low speed system oscillator which will consume less power. Users may decide to do this for certain
operations which do not require high performance and can subsequently reduce power consumption.
The SLOW Mode is sourced from the LXT or the LIRC oscillators and therefore requires these
oscillators to be stable before full mode switching occurs. This is monitored using the LTO bit in the
SMOD register.
Rev. 1.40
HT66F20-1/HT66F30-1/HT68F20-1/HT68F30-1
to the clock source, f /2~f
H, H H
W D T a n d L V D a r e a l l o f f
I D L E N = 0
H A L T i n s t r u c t i o n i s e x e c u t e d
W D T o r L V D i s o n
I D L E N = 0
H A L T i n s t r u c t i o n i s e x e c u t e d
S L E E P 1 M o d e
I D L E N = 1 , F S Y S O N = 0
H A L T i n s t r u c t i o n i s e x e c u t e d
I D E L 0 M o d e
I D L E N = 1 , F S Y S O N = 1
H A L T i n s t r u c t i o n i s e x e c u t e d
I D L E 1 M o d e
54
Flash MCU with EEPROM
/64 or f . If the clock is from the f
L
N O R M A L M o d e
C K S 2 ~ C K S 0 = 0 0 x B &
H L C L K = 0
S L O W M o d e
S L E E P 0 M o d e
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, the high
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