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Xilinx Zynq UltraScale+ ZCU208 User Manual page 89

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Appendix C: HW-XM650/655 Balun Daughter Cards for Gen 3 RFSoC EVM
Figure 42: High ADCIO and DACIO Digital I/O Header Pins
UG1410 (v1.0) July 8, 2020
www.xilinx.com
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ZCU208 Board User Guide
89
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