Xilinx Zynq UltraScale+ ZCU208 User Manual page 38

Table 15: IP4856CX25 U23 Adapter Pinout (cont'd)
Aires Adapter Pin Number
14
15
16
17
18
19
20
21
22
23
24
25
For more information on the IP4856CX25, see the
The detailed RFSoC connections for the feature described in this section are documented in the
ZCU208 board XDC file, referenced in
USB0 (MIO 52-63) USB 3.0 Transceiver and USB 2.0
The USB interface on the PS-side serves multiple roles as a host or device controller. The USB
3.0 interface (host mode only) is supported by the RFSoC GTR interface while the USB 2.0 (host
and device modes) capabilities of the SMSC USB3320C controller are shared on a common USB
3.0 micro USB type A connector (J18).
USB 3.0 Transceiver and USB 2.0 ULPI PHY
[Figure 2, callout 6]
The ZCU208 board uses a Standard Microsystems Corporation USB3320 USB 2.0 ULPI
Transceiver (U6) to support a USB connection to the host computer. A USB cable is supplied in
the ZCU208 Evaluation Kit (standard-A connector to host computer, USB 3.0 A connector to
ZCU208 board connector J18). The USB3320 is a high-speed USB 2.0 PHY supporting the UTMI
+ low pin interface (ULPI) interface standard. The ULPI standard defines the interface between
the USB controller IP and the PHY device which drives the physical USB bus. Use of the ULPI
standard reduces the interface pin count between the USB controller IP and the PHY device.
The following figure shows the USB 3.0 interface. USB 3.0 is host mode only.
UG1410 (v1.0) July 8, 2020
ZCU208 Board User Guide
Chapter 3: Board Component Descriptions
IP4856CX25 U23 Pin Number
B2
B1
E1
E3
A1
E5
D5
C5
D4
B5
A5
C2
NXP website.
Appendix B: Xilinx Design
IP4856CX25 U23 Pin Name
SEL
DATA3_H
DATA1_H
DIR_1_3
DATA2_H
DATA1_SD
DATA0_SD
CLK_SD
CMD_SD
DATA3_SD
DATA2_SD
ENABLE
Constraints.
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