Xilinx Zynq UltraScale+ ZCU208 User Manual page 37

The SDIO signals are connected to ZU48DR RFSoC PS bank 501 which has its VCCMIO set to
1.8V. The SD interface nets MIO[46:49]_SDIO_DAT[0:3], MIO50_SDIO_CMD, and
MIO51_SDIO_CLK each have a series 30Ω resistor at the Bank 501 source. An NXP
IP4856CX25 SD 3.0-compliant voltage level-translator U23 is present between the ZU48DR
RFSoC and the SD card connector (J23). The NXP IP4856CX25 U23 device provides SD3.0
capability with SDR104 performance.
The following figure shows the connections of the SD card interface on the ZCU208 board.
The NXP SD3.0 level shifter is mounted on an Aries adapter board that has the pin mapping
shown in the following table.
Table 15: IP4856CX25 U23 Adapter Pinout
Aires Adapter Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
UG1410 (v1.0) July 8, 2020
ZCU208 Board User Guide
Chapter 3: Board Component Descriptions
Figure 10: SD Card Interface
IP4856CX25 U23 Pin Number
C1
C3
D3
D2
E2
E4
B4
C4
A3
A4
B3
A2
D1
IP4856CX25 U23 Pin Name
CLK_IN
GND
CD
CMD_H
CLK_FB
WP
VLDO
VSD_REF
DIR_0
VSUPPLY
VCCA
DIR_CMD
DATA0_H
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