Mitsubishi Melsec-Q Series User Manual page 525

Hide thumbs Also See for Melsec-Q Series:
Table of Contents

Advertisement

Number
Name
Meaning
Error number that
SD50
Error reset
performs error
reset
Bit pattern
Battery low
indicating where
SD51
latch
battery voltage
drop occurred
Bit pattern
indicating where
SD52
Battery low
battery voltage
drop occurred
Number of times
AC/DC DOWN
SD53
for AC/DC DOWN
detection
detection
Number of
Number of module
SD60
module with
with blown fuse
blown fuse
I/O module
I/O module verify
SD61
verify error
error module
number
number
Table12.34 Special register
Explanation
• Stores error number that performs error reset
• All corresponding bits go 1(ON) when battery voltage drops.
• Subsequently, these remain 1(ON) even after battery voltage has been
returned to normal.
b15
to
b3 b2 b1 b0
0
• In the alarm, data can be held within the time specified for battery low.
• The error indicates the complete discharge of the battery.
• Same configuration as SD51 above
• After the alarm is detected (ON), the alarm turns OFF by error detection
(ON). (For the Universal model QCPU only)
• Turns to 0 (OFF) when the battery voltage returns to normal thereafter.
• Every time the input voltage falls to or below 85% (AC power)/65% (DC
power) of the rating during operation of the CPU module, the value is
incremented by 1 and stored in BIN code.
• The counter repeats increment and decrement of the value ;
0
32767
-32768
0
• Value stored here is the lowest station I/O number of the module with
the blown fuse.
• The lowest I/O number of the module where the I/O module verification
number took place.
CHAPTER12 TROUBLESHOOTING
Set by
(When Set)
U
CPU error
alarm
S (Error)
error
S (Error)
S (Error)
S (Error)
S (Error)
Corres-
ponding
Corresponding
ACPU
CPU
D9
New
New
QCPU
New
D9005
D9000
D9002
12 - 230
1
2
3
12
6
7
8

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents