Sony DVCAM DSR-PDX10 Service Manual page 67

DSR-PDX10/PDX10P
COVER
COVER
For Schematic Diagram
• Refer to page 4-119 for printed wiring board.
1 2 3
VC-318 BOARD(8/17)
DV INTERFACE(JC-2 BLOCK)
A
XX MARK:NO MOUNT
IC2102_1.9V
B
DIR
XACC
LBUS3
45
(7/17)
LBUS2
LBUS1
LBUS0
ICLK
C
XENA
FRL
FCLR
LCKO
SIGNAL PATH
D
VIDEO SIGNAL
AUDIO
CHROMA Y Y/CHROMA SIGNAL
REC
PB
E
F
G
16
VC-318 (8/17)
4-2. SCHEMATIC DIAGRAMS 4-2. SCHEMATIC DIAGRAMS
4 5
:Voltage measurement of
the CSP IC and
the Transistors with
mark,is not possible.
DIR
XACC
LBUS3
LBUS2 40 39 38
LBUS1
LBUS0
ICLK
XENA
41 VDD2
FRL LBUS3
42
ID3
LBUS2
FCLR
43
ID2
LCKO LBUS1
44
ID1
LBUS0
45
ID0
46
VSS
ICLK
47
ICLK
48
VSS
XENA
49
XINEN
FRL
50
FR
51
OFR
FCLR
52
IFCLEAR
53
VDD3
54
TEST0
55
TEST1
56
TEST2
57
TEST3
58
TEST4
59
TEST5
60
TEST6
61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
LCKO
4-45
VC-318 BOARD SIDE A VC-318 BOARD SIDE A
6 7 8
37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VSS
20
CNA
19
XRESETP
18
PWD
17
VDD3 16
VDD2 15
IC2102 AVS
14
AVD3
13
DV I/F
AVD3 12
IC2102 R1
11
SN104266BGGM-TEB
R0
CSP(CHIP SIZE PACKAGE)IC 10
TPA+
9
TPA-
8
TPB+
7
TPB-
6
AVD3 5
TPBIAS 4
AVS
3
AVD3
2
AVS
1
C2138
C2139
0.01u
0.1u
B B
VC-318 BOARD SIDE B VC-318 BOARD SIDE B
9 10 11
XRST_LINK
XRST_LINK
XDVCN
XDVCN
XRST_PHY
XRST_PHY
LIP_SLEEP
LIP_SLEEP
LPS
LPS
OFR
OFR
ALE
ALE
WRX
WRX
RDX
RDX
XCS_DIA
XCS_DIA
D24A00
D24A00
D25A01
D25A01
D26A02
D26A02
D27A03
XDVCN
D27A03
XRST_PHY D28A04
D28A04
LIP_SLEEP D29A05
D29A05
D30A06
D30A06
D31A07
D31A07
R2134
± 0.5%
12k
R2135
± 0.5%
12k
TPA+
TPA-
TPB+
TPB-
R2136 R2137
R2139
56 56 R2141
± 0.5% ± 0.5%
56 56
± 0.5%
± 0.5%
C2140
1u
R2138
B R2140 C2141
5100
XX
220p
± 0.5%
CH
L2105
10uH
FB2103
0uH
C2137
0.01u
B
C2136 C2135
10u
0.01u
6.3V
B
TA
4-46
12 13
50
(13/17)
43
(7/17)
43
(13/17)
TPA+
TPA-
51
(15/17)
TPB+
TPB-
D_2.8V
52
(17/17)
REG_GND