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Electra Elite
System Hardware Manual
4.5.2
Network
Time Division Multiplexing
separate data, voice and/or video simultaneously over
one communications medium. The Electra Elite 48
system specifications used for switching, clock, data bus,
and timeframe are shown below.
TDM Switching:
TDM Clock:
TDM Data Bus:
TDM Timeframe: 125 μs.
4.5.3
Control
This section lists the speed or capacity.
Control:
processing
Central Processor: 32-bit microprocessor
Clock:
Interface ETU:
Optional ETUs:
Multiline Terminal:
Attendant Console: 4-bit microprocessor
SLT Adapter:
4.5.4
Electra Elite Terminals and Equipment
The voltage, current, ring signal information for the Elite
Multiline Terminals, Single Line Telephone equipment,
and APA-U/APR-U Unit are listed below.
Multiline Terminal
Voltage:
Maximum Current:
Acoustical characteristics meet Electronic Industry
Association (EIA) standard proposal SP-1286 and
standard EIA RS-470.
Single Line Telephone
Standard 2500 Set:
Nominal Current:
allows transmission
PCM (μ Law)
2.048 MHz
8 bit
Stored program with distributed
16.384 MHz
8-bit or 16-bit microprocessor
16-bit or 32-bit microprocessor
8-bit microprocessor
4-bit microprocessor
-11 ~ -26 Vdc
250 mA
500 type network
35 mA
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