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SONY
CXD1244S
Offset
Offset
can
be
applied
to
the output data by
means
of
OFST
and
OPOL.
Pos/Neg
selection
of
the
offset
value
is
possible
as
indicated
in
the following chart.
OFST
OPOL
OUT
16,-18
Offset
value
L
L
H
H
H
H
X
X
H
H
L
L
L
H
L
H
L
H
0000(H)
00000
(H)
02AA
(H)
02AA8
(H)
FD55
(H)
FD554
(H)
6.
Muting
By
turning
MUTE
to
"H"
or INIT
to
"L"
the
offset
is
output.
When
INIT
is
at "L".
the
output
can be
muted. Then,
data
is
input
to this
LSI.
the
offset
value
set
at
7.
Data
polarity
Inversion
and non
inversion
of
the output
data
can be
selected by
means
of
DPOL.
When DPOL
is
at
"H",
non
inversion,
when
DPOL
is
at
"L", inversion.
6.
I/O
synchronizing
circuit
1)
Principle
A
window
featuring 10
internal
system
clocks (XIN/2)
is
set.
The
sync
circuit
observes whether
the
rising
edge
{LRCK
f
)
of
LRCK
that
is
input,
has
entered
the
window
or
not.
When
the
power
supply
is
turned
on,
should LRCK_-
be
out
of
the
window
the
sync
circuit
stops the
internal
processing
in
timing with the center
of
the
window. Synchronously
with the
appearance
of
the next
LRCKf
the
processing
is
started.
Through
this
operation synchronization
between
the
exterior
system and
this
LSI
is
established.
2)
Resynchronization by
means
of
INIT
Even
when
LRCKf
is
inside
the
window
but located close
to
one
of
the
2
edges
of
the
window,
the
sync
may
miss
with
the mingling
of
external noise
or
other
Re
sync
operation.
To
this
effect
it
is
necessary
to
apply resync, without
fault,
after
supply
is
turned
on.
ReSync
operation
is
executed
with the
INSTf
timing.
Sync,
circuit
is
initialized
and
LRCK
is
located
in
the
center
of
the
window.
Moreover,
when
the
sync
falls
out
of
the
window. INAF
output
turns
to
"H"
level.
3)
Non
synchronous
MUTE
When
INAF
is
at
H,
data
is
output regardless
of offset
ON/OFF,
34-
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