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SONYs
CXD1160AP/AQ
Digital
Audio
signal
processing
LSI
Description
CXD1 160AP/AQ
is
a
digital
audio
signal
processing
LSI.
Features
This LSI features
built-in
instruction
RAM,
coefficient
RAM,
multiplier,
barrel
shifter
and
others.
With regards
to
peripheral interface
usage,
serial
I/O,
delay
I/O
(stereo
delay
for
a max.
of
1024 samples
possible)
and microcomputer
interface
provide
excellent
system
cost
performance.
Structure
Silicon
gate
CMOS
Functions
(1)
Hardware
*
Master
clock
•
Machine
cycle
•
Instruction
• Built-in
RAM
•
Multiplying part
•
Adder-Subtractor
•
Register
30.72MHz
max.
(during
MCK1
input)
15.36MHz
max.
(during
MCK2
input)
130ns
min.
(1
60
cycle
max./fs=48KHz)
1
to
3
cycle
(single
precision/
double
precision)
instruction
RAM
24bitx64w
coefficient
RAM
16bitx64w
data
RAM
16bitx64w
16bitx16bit
built-in
multiplier
data
coefficient
(1)16x16(1
cycle)
(2)
16x32
(2
cycle)
(3)
32x1 6
(2
cycle)
(4)
32x32
(3
cycle)
34bit±34bit
Ace
34bit with
2bit shifter
For adder-
subtracter
R
(H.'L)
Serial I/O
1
1
(H/L)
I
2
(H/L)
O
1
(H
/L)
2
(H/L)
Delay
I/O
D1
(H/L)
D
(H/L)
Every
register 32bit
H/L can be used
independently
CXD1160AP
2Spin
DIP
(Plastic)
CXD
1
1
60AO
80pin
QFP
(Plastic)
»
Barrel
shifter
Address
stack
«
Loop
counter
Positive
floating
point
Type
conversion
Arithmetic
left
shift
Arithmetic
right shift
32bit IN
16bitOUT
shift
max.
15bit
double
4bit
I
(2)
interface
•
Serial I/O
Time-shared 2ch
input
2ch
output
Every channel data
format
32bit,(16bit+16blt),
24bit, 16bit,
Every channel
bit
clock
format
32ck,
24ck
MSB
first
•
Delay
I/O
Every channel
variable
delay
(1
to
1024 samples)
Usage
also possible
as
serial
I/O
•
Microcomputer
interface
E88Z02A15-YA
107-
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