Sony CXD2701Q Data Book page 139

3
Q
N"Y?
cxm
1
60AP>AQ
Instructions
Outline
In
one
24bit
word
length
command
the following
can be
executed
in
parallel.
©
K-RAM
and
D-RAM
address
setting,
©
MPY
Command,
©
AU Command
©
Transfer
Command
©
Jump Command.
Data handled include, single precision (16b),
double
precision (32b) or
through
a
combination
of
the
2.
from
1
cycle to 3 cycle
commands
are available,
©K-RAM
and
D-RAM
address
setting
Sets the
RAM
address
to
be handled by a
given
command.
For address
setting there
are,
absolute
address specify
and
relative
address
specify.
•
K-RAM
Single precision
coefficient
and
double
precision coefficient
(2W
in
succession)
can be
used
in this
order
or
otherwise. Write
is
also
enabled through a
command
allowing
for
use as a
temporary
register
•
D-RAM
Ring address.
The modulo added
value
of
the
address counter value incremented
at
each
serial I/O
sampling
cycle
and
that
of
the
address
set
by the
user
becomes
the actual
value.
Single precision data
and
double precision data
(2W
mutually
separated by
32
addresses.)
can be used
in
this
order or otherwise.
©MPY
Command
4
Types (K*D,
K*X, X*D, X*X)
and 4
kinds of
modes
(16b*
16b,
16b*32b. 32b*16b, 32b#32b)
can be handled.
Through
the respective
modes
the
execution cycle
of
the
command
is
determined.
K....K-RAM value
D,.,.
D-RAM
value
X.,.,From the register related
ones hanging
to
the
main
bus,
those
that
can
output Ace.
©AU
Command
Can
perform
addition, subtraction,
absolute value
and
comparison,
A
2bit shifter
Is
also
biult-in.
©Transfer
Command
Single precision data internally
transfers
double precision
data
via the
main
bus.
Barrel
shifter
operations are executed through
this
transfer
command.
©Jump
Command
There are unconditional jump, conditional
jump, subroutine
call
and
return,
loop jump.
Stack
features
a
2-stace structure
arc combination
with
double sub
routine or
loop
jump
is
possible.
Loop counter
can perform loop
jump
to
1
5
times
at
4b. At
every
serial I/O
sampling
cycle
forced
address jump
is
executed.
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