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SONY
CXD1160AP/AQ
(3)
24
bit
Clock
mode
24
bit
lN-24
bit
OUT
Timing
S
I
02
S
I
1
S
I
00
-5V
L
H
LRCK
r
bck
u~L(f
Tjn_rL,f
"L-n_n_(f
x-tltu
i_n
Si
hi
rerafn
^
xaEIBSD\\ 1CESCE5?\
EE3
so
£53
)
CSIXciD)
iCcSCSaJ'
ICasHEX)
OB
Register
V;ii
L5B
8 LSB
1
1
H An An
-A,
An
I
1
L
Am Ah
I
2H
Bi
i
H]
a
-B,
B„
I
2L
Bi
j
Bi
4
'
MSB
LSB
1H
C3
1
Cj
&
•
d
Ci.
01
L
C
I
'-
I
:
02H
Dii
D
t
>
-
0,
-
Dn
02L
0,!
Dm
-
D*
X
-
X
is
input
in
the
lower
8
bit
of
the input
register,
while the output
register
lower
8
bit
are
at
don't care.
24
bit
2ch
IN-24
bit
2ch
OUT.
Can
be
handled as
the
data
between
16
bit
and
8
bit.
Example
o
f
single precision
numerical expression
1
1
H=-A„,-I
2" A,,-,
I
iL-4ii
+
I.S-'At«-(
"Ai*-£
2~'A>
Example
ot
double
precision
numerical expression
1
IH=-Ati
+
I
2"
-A,,-,
«*
-A
3
,-i
2"'An
,
-
127
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