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SONY
Block
Diagram and
Pin
Configuration
(Top View)
K
4
B.
E
.-">..
Pin Description
Pin
No
j
Symbol
I/O
Description
1
INIT
I
Initiatize.
Active
when
set
"L".
Re- synchronized by
the
rising
edge
of this
signal.
2
DATA
I
1
sampling, 2-channel
serial
data
input.
Data
is
in
2's
complement
MSB
first
format.
3
BCK
I
Serial
data
input
tor serial
bit
clock, Serial input
data
is
latched
by
the
rising
edge
of
this
signal.
4
LRCK
I
Serial I/O for
the
sampling frequency
clock
input.
"L":
Channel
2
data
transfer
active; "H":
Channel
1
data
transfer active.
5
BCK02
Bit
clock output
with
weak
-output signal
of
192fs frequency.
6
VSS1
GND
7
BCKOI
Bit
clock
output.
192fs frequency.
3
DATAL
Serial
data
output.
Data
format
is
2's
complement
MSB
first,
81s
mode:
L
channel
output. 4fs
mode:
L
channel +
R
channel
output.
9
DATAR
Serial
data
output.
Data
format
is
2's
complement
MSB
first.
8fs
mode:
R
channel
output. 4fs
mode:
made
active
by
setting to
"L'.
10
WCKO
o
Word
clock output
of serial
data.
11
LRCKO
Serial
data sampling frequency
clock output.
12
API
Aperture
clock
output.
13
8/4
1
8fs/4fs input select. "H":
8fs; "L": 4fs.
14
SCK
o
System
clock output. fsck=fxt=384fs.
15
XOUT
Liquid crystal
display
oscillation
circuit
output.
-
160-
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