Sony CXD2701Q Data Book page 134

Semiconductor ic, digital audio ics
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SONY*
CXD1160AP.AQ
Delay
I/O
There
are
2 modes.
When
input
pin
DYSL
is
grounded
serial
mode
is
on.
When
it
is
set
to
+5V
delay
mode
is
ON.
Here
serial
mode means
delay
I/O
operates
similarly
as
serial
I/O.
Also,
in
delay
mode
DRAM
is
connected
to
the
exterior
and sample
delay executed
at
will.
The
following registers
correspond
to
delay
I/O
inside the
IC.
Handling
is
either
in
units
of
16
bit
or
32
bit.
Beg.
Contents
bit
length
R/W
Bit
expression
for later
mention
DIH
Input
high
word
register
16
R
E31
Esc
El7
El6
DIL
Input
low
word
register
16
R
Eis
E-
.
Ei
Eo
DOH
Output
high
word
register
16
W
F31
DOL
Output
low
word
register
16
W
Fl5
F14
Fi
Fo
In
the
Instructions, input register
is
for
read only while output
register
is
for
write only.
When
used as
single precision register
(16
bit),
the
4
registers
shown above
may
be
used
individually.
That
is
when
DIH
is
specified,
numerical expression
turns out
as
MSB
at
Esi
and
LSB
at Eie.
for
E
5
<-E,,
+
£ 2"%,-,
When
used
as double
precision
register
(32
bit),
DIH/L
and
DOHA
come
in
pairs.
That
is
when
DIH
is
specified,
numerical expression
turns out
as
MSB
at E31
and
LSB
at
EO.
for
L=-E:,,
+ Z r'B,
as
much
as
similarity
with
serial
I/O register
is
concerned.
However
there
is
a decisive
difference
where
the following points are
concerned.
In
serial
I/O register
two
32
bit
stereo
for
ich each, are
available.
The
2
input registers
maintain the
same
value
for
about
1LRCK.
That
is
from
the time both are input
near
LRCK
rising
edge
until
around
the next
LRCK
rising
edge. During
this
period read
is
possible
any
time.
Move
over
after
both the
2
output
registers
are output to
S/R
around
LRCK
rising
edge,
until
the following
LRCK
rising
edge and
for
about
the period
of
1LRCK,
the next value
to
be
output
should
be
input.
During
this
period,
usage as temporary
register
is
possible.
On
the
other
hand, delay
I/O register
has
only
32
bit
ich.
to
stereo
operate
that,
the input
register
has
to
be
input
twice during
1LRCK
period.
Similarly
the output
register
is
output
twice.
Accordingly
programs have
to
be
written
along
those
lines.
-
1
30

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