General Purpose I/O (Gpio); Signal Descriptions; Figure 23. Gpio - Intel Quark D2000 Design Manual

General Purpose I/O (GPIO)

9.0 General Purpose I/O (GPIO)
The SoC contains GPIO pins and the interfaces can be active at different times. To
provide maximum flexibility at the lowest cost point, some GPIO pins are shared/muxed
among various interfaces. BIOS is responsible for enabling proper configuration. The
SoC contains a single instance of the GPIO controller.

Figure 23. GPIO

The GPIO controller provides a total of 26 independently configurable GPIOs.

All GPIOs are interrupt capable supporting level sensitive and edge triggered
modes.
 All GPIOs support Debounce logic for interrupt sources.
 All 26 GPIOs are Always-on interrupt and wake capable.
9.1

Signal Descriptions

All GPIO pins are described in the SoC Datasheet.
November 2016
Document Number: 333580-002EN
Intel® Quark™ Microcontroller D2000
Platform Design Guide
35