Board Component Blocks - Altera Cyclone III LS Reference Manual

Fpga development board
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1–2

Board Component Blocks

The board features the following major component blocks:
Cyclone III LS FPGA Development Board Reference Manual
Cyclone III LS EP3CLS200F780 FPGA in the 780-pin FineLine BGA (FBGA)
package
198,464 LEs
8,211 Kbit on-die memory
20 global clocks
413 user I/O
4 phase locked loops (PLLs)
396 18x18 multipliers
1.2-V core power
MAX
®
II EPM2210F256 CPLD in the 256-pin FBGA package
2.5-V core power
FPGA configuration circuitry
MAX II CPLD EPM2210 System Controller and flash passive serial (PS)
configuration
On-board USB-Blaster
On-Board ports
Two HSMC expansion ports
One gigabit Ethernet port
On-Board memory
Two 512-Mbit 64-bit DDR2
2-Mbyte Synchronous Static Random Access Memory (SSRAM)
64-Mbyte flash
I
2
C EEPROM
On-Board clocking circuitry
Four on-board oscillators
50-MHz oscillator
66.6-MHz oscillator
100-MHz oscillator
Programmable oscillator with a default frequency of 125-MHz
LVPECL SMA connectors for external clock input
LVDS SMA connectors for external clock output
SMA connector for FPGA clock output
TM
for use with the Quartus
Chapter 1: Overview
Board Component Blocks
®
II Programmer
© October 2009 Altera Corporation

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