1–2
Board Component Blocks
The board features the following major component blocks:
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■
■
■
■
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Cyclone III LS FPGA Development Board Reference Manual
Cyclone III LS EP3CLS200F780 FPGA in the 780-pin FineLine BGA (FBGA)
package
198,464 LEs
■
8,211 Kbit on-die memory
■
20 global clocks
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413 user I/O
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4 phase locked loops (PLLs)
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396 18x18 multipliers
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1.2-V core power
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MAX
®
II EPM2210F256 CPLD in the 256-pin FBGA package
2.5-V core power
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FPGA configuration circuitry
MAX II CPLD EPM2210 System Controller and flash passive serial (PS)
■
configuration
On-board USB-Blaster
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On-Board ports
Two HSMC expansion ports
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One gigabit Ethernet port
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On-Board memory
Two 512-Mbit 64-bit DDR2
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2-Mbyte Synchronous Static Random Access Memory (SSRAM)
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64-Mbyte flash
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I
2
C EEPROM
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On-Board clocking circuitry
Four on-board oscillators
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50-MHz oscillator
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66.6-MHz oscillator
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100-MHz oscillator
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Programmable oscillator with a default frequency of 125-MHz
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LVPECL SMA connectors for external clock input
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LVDS SMA connectors for external clock output
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SMA connector for FPGA clock output
■
TM
for use with the Quartus
Chapter 1: Overview
Board Component Blocks
®
II Programmer
© October 2009 Altera Corporation
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