Altera Cyclone III LS Reference Manual page 10

2–2
Figure 2–1. Overview of the Cyclone III LS FPGA Development Board Features
Clock Output SMA
Connector (J15)
Clock Input SMAs
Connector (J7, J9)
USB Type-B
Connector (J4)
JTAG Connector
(J8)
Configuration Status
LEDs (D10-D14)
Programmable
Oscillator Output
(J13, J14)
Gigabit Ethernet
Port (J16)
LCD/HSMC Port B
Data Select (J18)
CPU Reset
Push-button
Switch (S2)
Table 2–1
Table 2–1. Cyclone III LS FPGA Development Board Components (Part 1 of 3)
Board Reference
Featured Devices
U15 FPGA
U22 CPLD
Configuration, Status, and Setup Elements
J4 USB type-B connector
J11 JTAG chain header
J12 Anti-Tamper JTAG select
header
D6 Anti-Tamper JTAG select LED
SW2 Board settings DIP switch
J8 JTAG connector
D13 Configuration done LED
Cyclone III LS FPGA Development Board Reference Manual
DDR2 Memory (U5, U6)
HSMC Port B (J1)
General
General User
User LEDs
Push-buttons
(D25-D28)
Switches
(S3 - S6)
describes the components and lists their corresponding board references.
Type
EP3CLS200F780, 780-pin FBGA.
EPM2210F256, 256-pin FBGA.
Connects to the computer to enable embedded USB-Blaster JTAG.
Enables and disables devices in the JTAG chain.
Placing a shunt on this jumper breaks the default JTAG chain, giving
FPGA JTAG signals control to the MAX II EPM2210 System Controller.
Illuminated when the default JTAG chain is broken and the MAX II
EPM2210 System Controller has control of the FPGA JTAG signals.
Controls the MAX II CPLD EPM2210 System Controller functions such
as clock enable, SMA clock input control, and which image to load
from flash memory at power-up.
Disables embedded blaster (for use with external USB-Blasters).
Illuminates when the FPGA is configured.
Cyclone III LS FPGA (U15)
HSMC Port A (J2) Flash x16 Memory (U9)
General Configuration
Configuration
User DIP Program and
Select
Switch (S7) Select
LEDs
Push-buttons
(D29-D31)
Switches (S8, S9)
Description
Chapter 2: Board Components
Board Overview
Power LED (D3)
Power Switch (SW1)
JTAG Anti-Tamper
Select LEDs (D6-D9)
DC Input Jack (J5)
CRC Error (S1)
SSRAM x36
Memory (U14)
JTAG Chain Header
& JTAG Select
Jumpers (J11, J12)
Board Settings
DIP Switch (SW2)
MAX II CPLD
EPM2210 System
Controller (U22)
Character LCD
(J19)
VCCA Shutdown
Push-Button
Switch (S11)
Max II Reset
Push-Button
Switch (S10)
© October 2009 Altera Corporation