Table of Contents
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Chapter 2: Board Components
Components and Interfaces
Table 2–35. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference
J1.44
Dedicated CMOS I/O bit 3
J1.47
Dedicated CMOS I/O bit 4
J1.48
Dedicated CMOS I/O bit 5
J1.49
Dedicated CMOS I/O bit 6
J1.50
Dedicated CMOS I/O bit 7
J1.53
Dedicated CMOS I/O bit 8
J1.54
Dedicated CMOS I/O bit 9
J1.55
Dedicated CMOS I/O bit 10
J1.56
Dedicated CMOS I/O bit 11
J1.59
Dedicated CMOS I/O bit 12
J1.60
Dedicated CMOS I/O bit 13
J1.61
Dedicated CMOS I/O bit 14
J1.62
Dedicated CMOS I/O bit 15
J1.65
Dedicated CMOS I/O bit 16
J1.66
Dedicated CMOS I/O bit 17
J1.67
Dedicated CMOS I/O bit 18
J1.68
Dedicated CMOS I/O bit 19
J1.71
Dedicated CMOS I/O bit 20
J1.72
Dedicated CMOS I/O bit 21
J1.73
Dedicated CMOS I/O bit 22
J1.74
Dedicated CMOS I/O bit 23
J1.77
Dedicated CMOS I/O bit 24
J1.78
Dedicated CMOS I/O bit 25
J1.79
Dedicated CMOS I/O bit 26
J1.80
Dedicated CMOS I/O bit 27
J1.83
Dedicated CMOS I/O bit 28
J1.84
Dedicated CMOS I/O bit 29
J1.85
Dedicated CMOS I/O bit 30
J1.86
Dedicated CMOS I/O bit 31
J1.89
Dedicated CMOS I/O bit 32
J1.90
Dedicated CMOS I/O bit 33
J1.91
Dedicated CMOS I/O bit 34
J1.92
Dedicated CMOS I/O bit 35
J1.95
Dedicated CMOS I/O bit 36
J1.96
Dedicated CMOS I/O bit 37
J1.97
Dedicated CMOS I/O bit 38
J1.98
Dedicated CMOS I/O bit 39
J1.101
Dedicated CMOS I/O bit 40
© October 2009 Altera Corporation
Description
Schematic Signal
Name
I/O Standard
HSMB_D3
HSMB_D4
HSMB_D5
HSMB_D6
HSMB_D7
HSMB_D8
HSMB_D9
HSMB_D10
HSMB_D11
HSMB_D12
HSMB_D13
HSMB_D14
HSMB_D15
HSMB_D16
HSMB_D17
HSMB_D18
HSMB_D19
HSMB_D20
HSMB_D21
HSMB_D22
HSMB_D23
HSMB_D24
HSMB_D25
HSMB_D26
HSMB_D27
HSMB_D28
HSMB_D29
HSMB_D30
HSMB_D31
HSMB_D32
HSMB_D33
HSMB_D34
HSMB_D35
HSMB_D36
HSMB_D37
HSMB_D38
HSMB_D39
HSMB_D40
Cyclone III LS FPGA Development Board Reference Manual
2–33
(1)
Cyclone III LS
Device
Pin Number
V6
L5
U2
L4
U3
K5
U5
K4
P4
J7
P3
J6
N6
H6
M6
H2
K3
H1
K2
2.5-V
G6
J3
G3
J1
G1
J2
G2
H3
F4
E3
F1
E4
F5
D1
E1
D3
E2
C1
AE3
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