Altera Cyclone III LS Reference Manual page 54

Fpga development board
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2–46
Figure 2–11
Figure 2–11. Power Measurement Circuit
Supply
0-7
Table 2–46
name of the rail being measured and the device pin column specifies the devices
attached to the rail. If no subnet is named, the power is the total output power for that
voltage.
Table 2–46. Power Rails Measurement Based on the Rail Selected in the Power GUI
Switch
Schematic Signal Name
1
VCCIO_B1B2
2
VCCIO_B3B4
3
VCCIO_B5B6
4
VCCIO_B7
5
VCCIO_B8
6
C3LS_VCCINT
7
VCCD_PLL
8
C3LS_VCCA
Table 2–47
manufacturing information.
Table 2–47. Power Measurement ADC Component Reference and Manufacturing Information
Board Reference
U1
8-channel differential 24-bit ADC
Cyclone III LS FPGA Development Board Reference Manual
shows the block diagram for the power measurement circuitry.
Feedback
Power Supply Load # 0-7
R
SENSE
SCK
3 mΩ
8 Ch.
DSO
CSn
lists the targeted rails. The schematic signal name column specifies the
Voltage (V)
2.5
2.5
2.5
1.8
1.8
1.2
1.2
2.5
lists the power measurement ADC component reference and
Description
Manufacturer
Linear Technology
Embedded
USB-Blaster
EPM
240
Z
JTAG Chain
EPM2210
DSI
Device Pin
FPGA I/O power bank 1 (HSMB)
VCCIO1
FPGA I/O power bank 2 (HSMB, flash)
VCCIO2
FPGA I/O power bank 3 (MAX II, SSRAM,
VCCIO3
flash, FSM, Ethernet, user I/O)
FPGA I/O power bank 4 (MAX II, SSRAM,
VCCIO4
flash, FSM, Ethernet)
FPGA I/O power bank 5 (HSMA)
VCCIO5
FPGA I/O power bank 6 (HSMA)
VCCIO6
FPGA I/O power bank 7 (DDR2, user I/O)
VCCIO7
FPGA I/O power bank 8 (DDR2, user I/O)
VCCIO8
FPGA core power
VCCINT
FPGA PLL digital power
VCCD_PLL
FPGA PLL analog power
VCCA
Manufacturing
Part Number
LTC2418CGN#PBF
Chapter 2: Board Components
Power Supply
To User PC
Power GUI
USB
PHY
E
14-pin
RW
2x16 LCD
RS
D(0:7)
3CLS200
Description
Manufacturer
Website
www.linear.com
© October 2009 Altera Corporation

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