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22.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the
CIP-51 system controller. These registers are used to exchange data with a module and configure the
module's mode of operation.
Table 22.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA capture/com-
pare module's operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1. See
Figure 22.3 for details on the PCA interrupt configuration.
Table 22.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
PWM16 ECOM CAPP CAPN MAT
X
X
1
X
X
0
X
X
1
X
1
0
X
1
0
X
1
0
0
1
0
1
1
0
X = Don't Care
(for n = 0 to 4)
PCA0CPMn
PCA0CN
P
P
E
C
C
M
T
E
C
C
W
W
C
A
A
A
O
C
F
R
M
M
O
P
P
T
G
C
1
n
M
P
N
n
n
F
6
n
n
n
n
n
PCA Counter/
Timer Overflow
PCA Module 0
(CCF0)
PCA Module 1
(CCF1)
PCA Module 2
(CCF2)
PCA Module 3
(CCF3)
PCA Module 4
(CCF4)
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
TOG
PWM ECCF
0
0
0
1
0
0
1
0
0
0
1
0
0
1
1
0
X
1
0
X
0
0
X
0
PCA0MD
C
C
C
C
C
C
W
W
C
C
C
E
C
C
C
C
C
I
D
D
P
P
P
C
F
F
F
F
F
D
T
L
S
S
S
F
4
3
2
1
0
L
E
C
2
1
0
K
0
1
ECCF0
0
1
ECCF1
0
1
ECCF2
0
1
ECCF3
0
1
ECCF4
0
1
Figure 22.3. PCA Interrupt Block Diagram
Rev. 1.3
Operation Mode
Capture triggered by positive edge on
0
X
CEXn
Capture triggered by negative edge on
0
X
CEXn
0
X
Capture triggered by transition on CEXn
0
X
Software Timer
0
X
High Speed Output
1
X
Frequency Output
1
X
8-Bit Pulse Width Modulator
1
X
16-Bit Pulse Width Modulator
EPCA0
EA
Interrupt
0
0
Priority
1
1
Decoder
257
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