Table 13.1. Ac Parameters For External Memory Interface - Silicon Laboratories C8051F341 Product Manual

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D

Table 13.1. AC Parameters for External Memory Interface

Parameter
T
Address / Control Setup Time
ACS
T
Address / Control Pulse Width
ACW
T
Address / Control Hold Time
ACH
T
Address Latch Enable High Time
ALEH
T
Address Latch Enable Low Time
ALEL
T
Write Data Setup Time
WDS
T
Write Data Hold Time
WDH
T
Read Data Setup Time
RDS
T
Read Data Hold Time
RDH
*Note: T is equal to one period of the device system clock (SYSCLK).
SYSCLK
130
Description
Rev. 1.3
Min* Max*
3 x T
0
SYSCLK
1 x T 16 x T
SYSCLK SYSCLK
3 x T
0
SYSCLK
1 x T 4 x T
SYSCLK SYSCLK
1 x T 4 x T
SYSCLK SYSCLK
1 x T 19 x T
SYSCLK SYSCLK
3 x T
0
SYSCLK
20
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns