Clock Multiplier; Sfr Definition 14.5. Clkmul: Clock Multiplier Control - Silicon Laboratories C8051F341 Product Manual

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
14.4. 4x Clock Multiplier
The 4x Clock Multiplier allows a 12 MHz oscillator to generate the 48 MHz clock required for Full Speed
USB communication (see
the Multiplier output can also be used as the system clock. C8051F340/1/2/3 devices can use the 48 MHz
Clock Multiplier output as system clock. See Table 3.1, "Global DC Electrical Characteristics," on page 25
for system clock frequency specifications. See
source selection.
The 4x Clock Multiplier is configured via the CLKMUL register. The procedure for configuring and enabling
the 4x Clock Multiplier is as follows:
1. Reset the Multiplier by writing 0x00 to register CLKMUL.
2. Select the Multiplier input source via the MULSEL bits.
3. Enable the Multiplier with the MULEN bit (CLKMUL | = 0x80).
4. Delay for >5 µs.
5. Initialize the Multiplier with the MULINIT bit (CLKMUL | = 0xC0).
6. Poll for MULRDY => '1'.
Important Note: When using an external oscillator as the input to the 4x Clock Multiplier, the exter-
nal source must be enabled and stable before the Multiplier is initialized. See
details on selecting an external oscillator source.

SFR Definition 14.5. CLKMUL: Clock Multiplier Control

R/W R/W
MULEN MULINIT MULRDY
Bit7 Bit6
Bit7: MULEN: Clock Multiplier Enable
0: Clock Multiplier disabled.
1: Clock Multiplier enabled.
Bit6: MULINIT: Clock Multiplier Initialize
This bit should be a '0' when the Clock Multiplier is enabled. Once enabled, writing a '1' to
this bit will initialize the Clock Multiplier. The MULRDY bit reads '1' when the Clock Multiplier
is stabilized.
Bit5: MULRDY: Clock Multiplier Ready
This read-only bit indicates the status of the Clock Multiplier.
0: Clock Multiplier not ready.
1: Clock Multiplier ready (locked).
Bits4–2: Unused. Read = 000b; Write = don't care.
Bits1–0: MULSEL: Clock Multiplier Input Select
These bits select the clock supplied to the Clock Multiplier.
MULSEL
00
01
10
11
138
Section "16.4. USB Clock Configuration" on page 166
Section 14.5
R R/W R/W
-
Bit5 Bit4 Bit3
Selected Clock
Internal Oscillator
External Oscillator
External Oscillator / 2
RESERVED
Rev. 1.3
for details on system clock and USB clock
R/W R/W
- - MULSEL
Bit2 Bit1
). A divided version of
Section 14.5 for
R/W Reset Value
00000000
Bit0 SFR Address
0xB9