Sfr Definition 21.10. Tmr2Rlh: Timer 2 Reload Register High Byte; Sfr Definition 21.9. Tmr2Rll: Timer 2 Reload Register Low Byte; Sfr Definition 21.12. Tmr2H Timer 2 High Byte; Sfr Definition 21.11. Tmr2L: Timer 2 Low Byte - Silicon Laboratories C8051F341 Product Manual

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D

SFR Definition 21.9. TMR2RLL: Timer 2 Reload Register Low Byte

R/W R/W
Bit7 Bit6
Bits 7–0: TMR2RLL: Timer 2 Reload Register Low Byte.
TMR2RLL holds the low byte of the reload value for Timer 2 when operating in auto-reload
mode, or the captured value of the TMR2L register in capture mode.

SFR Definition 21.10. TMR2RLH: Timer 2 Reload Register High Byte

R/W R/W
Bit7 Bit6
Bits 7–0: TMR2RLH: Timer 2 Reload Register High Byte.
The TMR2RLH holds the high byte of the reload value for Timer 2 when operating in
auto-reload mode, or the captured value of the TMR2H register in capture mode.

SFR Definition 21.11. TMR2L: Timer 2 Low Byte

R/W R/W
Bit7 Bit6
Bits 7–0: TMR2L: Timer 2 Low Byte.
In 16-bit mode, the TMR2L register contains the low byte of the 16-bit Timer 2. In 8-bit mode,
TMR2L contains the 8-bit low byte timer value.

SFR Definition 21.12. TMR2H Timer 2 High Byte

R/W R/W
Bit7 Bit6
Bits 7–0: TMR2H: Timer 2 High Byte.
In 16-bit mode, the TMR2H register contains the high byte of the 16-bit Timer 2. In 8-bit
mode, TMR2H contains the 8-bit high byte timer value.
248
R/W R/W R/W
Bit5 Bit4 Bit3
R/W R/W R/W
Bit5 Bit4 Bit3
R/W R/W R/W
Bit5 Bit4 Bit3
R/W R/W R/W
Bit5 Bit4 Bit3
Rev. 1.3
R/W R/W R/W
Bit2 Bit1 Bit0
R/W R/W R/W
Bit2 Bit1 Bit0
R/W R/W R/W
Bit2 Bit1 Bit0
R/W R/W R/W
Bit2 Bit1 Bit0
Reset Value
00000000
SFR Address:
0xCA
Reset Value
00000000
SFR Address:
0xCB
Reset Value
00000000
SFR Address:
0xCC
Reset Value
00000000
SFR Address:
0xCD