21.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload
Mode 2 configures Timer 0 and Timer 1 to operate as 8-bit counter/timers with automatic reload of the start
value. TL0 holds the count and TH0 holds the reload value. When the counter in TL0 overflows from all
ones to 0x00, the timer overflow flag TF0 (TCON.5) is set and the counter in TL0 is reloaded from TH0. If
Timer 0 interrupts are enabled, an interrupt will occur when the TF0 flag is set. The reload value in TH0 is
not changed. TL0 must be initialized to the desired value before enabling the timer for the first count to be
correct. When in Mode 2, Timer 1 operates identically to Timer 0.
Both counter/timers are enabled and configured in Mode 2 in the same manner as Mode 0. Setting the
TR0 bit (TCON.4) enables the timer when either GATE0 (TMOD.3) is logic 0 or when the input signal INT0
is active as defined by bit IN0PL in register INT01CF (see
page 88
for details on the external input signals INT0 and INT1).
Pre-scaled Clock
SYSCLK
T0
Crossbar
IN0PL
INT0
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
CKCON
T
T
S
S
G
T
T
T
T
A
3
3
2
2
1
0
C
C
T
M
M
M
M
M
M
A
A
E
H
L
H
L
1
0
0
0
1
1
TR0
GATE0
XOR
Figure 21.2. T0 Mode 2 Block Diagram
Rev. 1.3
Section "9.3.2. External Interrupts" on
TMOD
INT01CF
C
T
T
G
C
T
T
I
I
I
I
I
I
I
/
1
1
A
/
0
0
N
N
N
N
N
N
N
T
M
M
T
T
M
M
1
1
1
1
0
0
0
1
1
0
E
0
1
0
P
S
S
S
P
S
S
1
0
L
L
L
L
L
L
L
2
1
0
2
1
TCLK
TL0
(8 bits)
TH0
Reload
(8 bits)
I
N
0
S
L
0
TF1
TR1
TF0
Interrupt
TR0
IE1
IT1
IE0
IT0
237
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