Table 17.3. Sources For Hardware Changes To Smb0Cn - Silicon Laboratories C8051F341 Product Manual

Table 17.3. Sources for Hardware Changes to SMB0CN

Bit Set by Hardware When:
• A START is generated.
MASTER
• START is generated.
• SMB0DAT is written before the start of an
TXMODE
SMBus frame.
• A START followed by an address byte is
STA
received.
• A STOP is detected while addressed as a
STO slave.
• Arbitration is lost due to a detected STOP.
• A byte has been received and an ACK
ACKRQ
response value is needed.
• A repeated START is detected as a MASTER
when STA is low (unwanted repeated START).
• SCL is sensed low while attempting to gener-
ARBLOST
ate a STOP or repeated START condition.
• SDA is sensed low while transmitting a '1'
(excluding ACK bits).
• The incoming ACK value is low (ACKNOWL-
ACK
EDGE).
• A START has been generated.
• Lost arbitration.
• A byte has been transmitted and an ACK/
NACK received.
SI
• A byte has been received.
• A START or repeated START followed by a
slave address + R/W has been received.
• A STOP has been received.
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Rev. 1.3
Cleared by Hardware When:
• A STOP is generated.
• Arbitration is lost.
• A START is detected.
• Arbitration is lost.
• SMB0DAT is not written before the
start of an SMBus frame.
• Must be cleared by software.
• A pending STOP is generated.
• After each ACK cycle.
• Each time SI is cleared.
• The incoming ACK value is high (NOT
ACKNOWLEDGE).
• Must be cleared by software.
197