Figure 15.2. Port I/O Cell Block Diagram - Silicon Laboratories C8051F341 Product Manual

C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
W E A K -P U LLU P
P U S H -P U LL
P O R T -O U T E N A B LE
P O R T -O U T P U T
A nalog S elect
A N A LO G IN P U T
P O R T -IN P U T

Figure 15.2. Port I/O Cell Block Diagram

V D D
G N D
Rev. 1.3
V D D
(W E A K )
P O R T
P A D
143