Usb Register Definition 16.12. Out1Int: Usb0 Out Endpoint Interrupt; Usb Register Definition 16.11. In1Int: Usb0 In Endpoint Interrupt - Silicon Laboratories C8051F341 Product Manual

USB Register Definition 16.11. IN1INT: USB0 IN Endpoint Interrupt

R R
- -
Bit7 Bit6
Bits7–4: Unused. Read = 0000b. Write = don't care.
Bit3: IN3: IN Endpoint 3 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 3 interrupt inactive.
1: IN Endpoint 3 interrupt active.
Bit2: IN2: IN Endpoint 2 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 2 interrupt inactive.
1: IN Endpoint 2 interrupt active.
Bit1: IN1: IN Endpoint 1 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: IN Endpoint 1 interrupt inactive.
1: IN Endpoint 1 interrupt active.
Bit0: EP0: Endpoint 0 Interrupt-pending Flag
This bit is cleared when software reads the IN1INT register.
0: Endpoint 0 interrupt inactive.
1: Endpoint 0 interrupt active.

USB Register Definition 16.12. OUT1INT: USB0 Out Endpoint Interrupt

R R
- -
Bit7 Bit6
Bits7–4: Unused. Read = 0000b. Write = don't care.
Bit3: OUT3: OUT Endpoint 3 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 3 interrupt inactive.
1: OUT Endpoint 3 interrupt active.
Bit2: OUT2: OUT Endpoint 2 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 2 interrupt inactive.
1: OUT Endpoint 2 interrupt active.
Bit1: OUT1: OUT Endpoint 1 Interrupt-pending Flag
This bit is cleared when software reads the OUT1INT register.
0: OUT Endpoint 1 interrupt inactive.
1: OUT Endpoint 1 interrupt active.
Bit0: Unused. Read = 0; Write = don't care.
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
R R R
- - IN3
Bit5 Bit4 Bit3
R R R
- - OUT3
Bit5 Bit4 Bit3
Rev. 1.3
R R R
IN2 IN1 EP0
Bit2 Bit1 Bit0
R R R
OUT2 OUT1 -
Bit2 Bit1 Bit0
Reset Value
00000000
USB Address:
0x02
Reset Value
00000000
USB Address:
0x04
173