Shared Memory Bus Request
Use these specifications for passing bus mastership between
ADSP-21368 processors (BRx).
Table 28. Multiprocessor Bus Request
Parameter
Timing Requirements
t
BRx, Setup Before CLKIN High
SBRI
t
BRx, Hold After CLKIN High
HBRI
Switching Characteristics
t
BRx Delay After CLKIN High
DBRO
t
BRx Hold After CLKIN High
HBRO
CLKIN
BR
(OUT)
X
BR
(IN)
X
ADSP-21367/ADSP-21368/ADSP-21369
t
DBRO
t
HBRO
Figure 21. Shared Memory Bus Request
Rev. D | Page 31 of 56 | November 2008
Min
Max
9
0.5
9
1.0
t
t
SBRI
HBRI
Unit
ns
ns
ns
ns
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