Q170Mscpu System Internal Configuration - Mitsubishi Electric Q170MSCPU User Manual

2 SYSTEM CONFIGURATION

2.1.2 Q170MSCPU System internal configuration

PLC CPU area (CPU No.1 fixed)
PLC control
processor
PLC I/O module
24VDC
(DI/O)
Personal computer
GX Works2
MT Developer2
(1) What is Multiple CPU system for Q170MSCPU ?
A Multiple CPU system for Q170MSCPU is a system in which the PLC CPU area
and Motion CPU area are connected with the Multiple CPU high speed bus in
order to control the I/O modules and intelligent function modules.
PLC CPU area is fixed as CPU No.1, and Motion CPU area is fixed as CPU No.2.
In addition, the Motion CPU area controls the servo amplifiers connected by
SSCNET cable.
Motion controller
Device memory
Multiple CPU
high speed
transmission
memory
Q series PLC system bus
PLC intelligent
function module
(A/D, D/A, Network etc.)
Input signal/Mark detection input signal (4 points)
Output signal (2 points)
(a) The device memory is the memory area for the bit devices (X, Y, M, etc.)
and word devices (D, W, etc.).
(b) The Multiple CPU high speed transmission memory between the PLC CPU
area and Motion CPU area can be communicated at 0.88ms cycles.
Motion CPU area (CPU No.2 fixed)
Device memory
Multiple CPU
high speed
Multiple CPU
bus
high speed
transmission
memory
Motion module
(Proximity dog signal, manual
pulse generator input)
Forced stop input (24VDC)
Manual pulse generator/Incremental
synchronous encoder 1 module
PERIPHERAL I/F
Personal computer
MT Developer2
2 - 5
Motion control
processor
SSCNET (/H)
P
M M
Servo external
input signals
(FLS, RLS, DOG)
Servo
amplifier
Servo
motor