Usb-To-Uart Bridge - Xilinx VC709 User Manual

Chapter 1: VC709 Evaluation Board Features
Table 1-14: SFP+ Module Control and Status (Cont'd)
SFP+ Module 3 (P4)
SFP+ Module 4 (P5)
Note:

USB-to-UART Bridge

[Figure
The VC709 board contains a Silicon Labs CP2103GM USB-to-UART bridge device (U44)
which allows a connection to a host computer with a USB port. The USB cable is supplied
in the VC709 evaluation kit (type-A end to host computer, type mini-B end to VC709 board
connector J17). The CP2103GM is powered by the USB 5V provided by the host PC when
the USB cable is plugged into the USB port on the VC709 board.
Xilinx UART IP is expected to be implemented in the FPGA fabric. The FPGA supports the
USB-to-UART bridge using four signal pins: Transmit (TX), Receive (RX), Request to Send
(RTS), and Clear to Send (CTS).
Silicon Labs provides royalty-free Virtual COM Port (VCP) drivers for the host computer.
These drivers permit the CP2103GM USB-to-UART bridge to appear as a COM port to
communications application software (for example, TeraTerm or HyperTerm) that runs on
the host computer. The VCP device drivers must be installed on the host PC prior to
establishing communications with the VC709 board.
The USB Connector pin assignments and signal definitions between J17 and U44 are listed
in
42
XCVX690T (U1) Pin
AA41
AC39
AD42
AE42
AD38
AC38
AE38
AC41
AE39
AE40
AD40
AC40
The six control/status signals to/from each SFP+ connector are routed through a level shifter.
1-2, callout 13]
Table 1-15.
www.xilinx.com
Net Name
SFP3_TX_FAULT
SFP3_MOD_DETECT
SFP3_RS0
SFP3_RS1
SFP3_LOS
SFP3_TX_DISABLE
SFP4_TX_FAULT
SFP4_MOD_DETECT
SFP4_RS0
SFP4_RS1
SFP4_LOS
SFP4_TX_DISABLE
SFP+ Module
Pin Number Pin Name
2 TX_FAULT
6 MOD_ABS
7 RS0
9 RS1
8 LOS
3 TX_DISABLE
2 TX_FAULT
6 MOD_ABS
7 RS0
9 RS1
8 LOS
3 TX_DISABLE
VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014