Xilinx VC709 User Manual page 89

For the virtex-7 fpga
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VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D22]
set_property PACKAGE_PIN G14 [get_ports DDR3_A_D23]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D23]
set_property PACKAGE_PIN G13 [get_ports DDR3_A_D20]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D20]
set_property PACKAGE_PIN H14 [get_ports DDR3_A_D14]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D14]
set_property PACKAGE_PIN J13 [get_ports DDR3_A_D11]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D11]
set_property PACKAGE_PIN H13 [get_ports DDR3_A_D10]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D10]
set_property PACKAGE_PIN K12 [get_ports DDR3_A_DQS1_P]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DQS1_P]
set_property PACKAGE_PIN J12 [get_ports DDR3_A_DQS1_N]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DQS1_N]
set_property PACKAGE_PIN K15 [get_ports DDR3_A_DM1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DM1]
set_property PACKAGE_PIN J15 [get_ports DDR3_A_D15]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D15]
set_property PACKAGE_PIN K14 [get_ports DDR3_A_D8]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D8]
set_property PACKAGE_PIN K13 [get_ports DDR3_A_D9]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D9]
set_property PACKAGE_PIN L16 [get_ports DDR3_A_D12]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D12]
set_property PACKAGE_PIN L15 [get_ports DDR3_A_D13]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D13]
set_property PACKAGE_PIN L12 [get_ports DDR3_A_D7]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D7]
set_property PACKAGE_PIN M14 [get_ports DDR3_A_D3]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D3]
set_property PACKAGE_PIN L14 [get_ports DDR3_A_D2]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D2]
set_property PACKAGE_PIN N16 [get_ports DDR3_A_DQS0_P]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DQS0_P]
set_property PACKAGE_PIN M16 [get_ports DDR3_A_DQS0_N]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DQS0_N]
set_property PACKAGE_PIN N13 [get_ports DDR3_A_D1]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D1]
set_property PACKAGE_PIN M13 [get_ports DDR3_A_DM0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_DM0]
set_property PACKAGE_PIN N15 [get_ports DDR3_A_D5]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D5]
set_property PACKAGE_PIN N14 [get_ports DDR3_A_D0]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D0]
set_property PACKAGE_PIN M12 [get_ports DDR3_A_D4]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D4]
set_property PACKAGE_PIN M11 [get_ports DDR3_A_D6]
set_property IOSTANDARD SSTL15 [get_ports DDR3_A_D6]
set_property PACKAGE_PIN AL2 [get_ports SFP4_TX_P]
set_property PACKAGE_PIN AJ6 [get_ports SFP4_RX_P]
set_property PACKAGE_PIN AL1 [get_ports SFP4_TX_N]
set_property PACKAGE_PIN AJ5 [get_ports SFP4_RX_N]
set_property PACKAGE_PIN AM4 [get_ports SFP3_TX_P]
set_property PACKAGE_PIN AL6 [get_ports SFP3_RX_P]
set_property PACKAGE_PIN AM3 [get_ports SFP3_TX_N]
set_property PACKAGE_PIN AH8 [get_ports SI5324_OUT_C_P]
set_property PACKAGE_PIN AL5 [get_ports SFP3_RX_N]
set_property PACKAGE_PIN AH7 [get_ports SI5324_OUT_C_N]
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VC709 Board XDC Listing
89

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