Xilinx VC709 User Manual page 90

Appendix C: Master XDC Listing
90
set_property PACKAGE_PIN AK7 [get_ports SMA_MGT_REFCLK_N]
set_property PACKAGE_PIN AK8 [get_ports SMA_MGT_REFCLK_P]
set_property PACKAGE_PIN AN2 [get_ports SFP2_TX_P]
set_property PACKAGE_PIN AM8 [get_ports SFP2_RX_P]
set_property PACKAGE_PIN AN1 [get_ports SFP2_TX_N]
set_property PACKAGE_PIN AM7 [get_ports SFP2_RX_N]
set_property PACKAGE_PIN AP4 [get_ports SFP1_TX_P]
set_property PACKAGE_PIN AN6 [get_ports SFP1_RX_P]
set_property PACKAGE_PIN AP3 [get_ports SFP1_TX_N]
set_property PACKAGE_PIN AN5 [get_ports SFP1_RX_N]
set_property PACKAGE_PIN AG2 [get_ports PCIE_TX4_P]
set_property PACKAGE_PIN AD4 [get_ports PCIE_RX4_P]
set_property PACKAGE_PIN AG1 [get_ports PCIE_TX4_N]
set_property PACKAGE_PIN AD3 [get_ports PCIE_RX4_N]
set_property PACKAGE_PIN AH4 [get_ports PCIE_TX5_P]
set_property PACKAGE_PIN AE6 [get_ports PCIE_RX5_P]
set_property PACKAGE_PIN AH3 [get_ports PCIE_TX5_N]
set_property PACKAGE_PIN AE5 [get_ports PCIE_RX5_N]
set_property PACKAGE_PIN AJ2 [get_ports PCIE_TX6_P]
set_property PACKAGE_PIN AF4 [get_ports PCIE_RX6_P]
set_property PACKAGE_PIN AJ1 [get_ports PCIE_TX6_N]
set_property PACKAGE_PIN AF3 [get_ports PCIE_RX6_N]
set_property PACKAGE_PIN AK4 [get_ports PCIE_TX7_P]
set_property PACKAGE_PIN AG6 [get_ports PCIE_RX7_P]
set_property PACKAGE_PIN AK3 [get_ports PCIE_TX7_N]
set_property PACKAGE_PIN AG5 [get_ports PCIE_RX7_N]
set_property PACKAGE_PIN W2 [get_ports PCIE_TX0_P]
set_property PACKAGE_PIN Y4 [get_ports PCIE_RX0_P]
set_property PACKAGE_PIN W1 [get_ports PCIE_TX0_N]
set_property PACKAGE_PIN Y3 [get_ports PCIE_RX0_N]
set_property PACKAGE_PIN AA2 [get_ports PCIE_TX1_P]
set_property PACKAGE_PIN AA6 [get_ports PCIE_RX1_P]
set_property PACKAGE_PIN AA1 [get_ports PCIE_TX1_N]
set_property PACKAGE_PIN AA5 [get_ports PCIE_RX1_N]
set_property PACKAGE_PIN AB7 [get_ports PCIE_CLK_QO_N]
set_property PACKAGE_PIN AB8 [get_ports PCIE_CLK_QO_P]
set_property PACKAGE_PIN AC2 [get_ports PCIE_TX2_P]
set_property PACKAGE_PIN AB4 [get_ports PCIE_RX2_P]
set_property PACKAGE_PIN AC1 [get_ports PCIE_TX2_N]
set_property PACKAGE_PIN AB3 [get_ports PCIE_RX2_N]
set_property PACKAGE_PIN AE2 [get_ports PCIE_TX3_P]
set_property PACKAGE_PIN AC6 [get_ports PCIE_RX3_P]
set_property PACKAGE_PIN AE1 [get_ports PCIE_TX3_N]
set_property PACKAGE_PIN AC5 [get_ports PCIE_RX3_N]
set_property PACKAGE_PIN M4 [get_ports FMC1_HPC_DP9_C2M_P]
set_property PACKAGE_PIN N6 [get_ports FMC1_HPC_DP9_M2C_P]
set_property PACKAGE_PIN M3 [get_ports FMC1_HPC_DP9_C2M_N]
set_property PACKAGE_PIN N5 [get_ports FMC1_HPC_DP9_M2C_N]
set_property PACKAGE_PIN N2 [get_ports FMC1_HPC_DP8_C2M_P]
set_property PACKAGE_PIN P8 [get_ports FMC1_HPC_DP8_M2C_P]
set_property PACKAGE_PIN N1 [get_ports FMC1_HPC_DP8_C2M_N]
set_property PACKAGE_PIN P7 [get_ports FMC1_HPC_DP8_M2C_N]
set_property PACKAGE_PIN F4 [get_ports FMC1_HPC_DP7_C2M_P]
set_property PACKAGE_PIN E6 [get_ports FMC1_HPC_DP7_M2C_P]
set_property PACKAGE_PIN F3 [get_ports FMC1_HPC_DP7_C2M_N]
set_property PACKAGE_PIN E5 [get_ports FMC1_HPC_DP7_M2C_N]
set_property PACKAGE_PIN G2 [get_ports FMC1_HPC_DP6_C2M_P]
set_property PACKAGE_PIN F8 [get_ports FMC1_HPC_DP6_M2C_P]
set_property PACKAGE_PIN G1 [get_ports FMC1_HPC_DP6_C2M_N]
www.xilinx.com VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014