Xilinx VC709 User Manual page 40

Chapter 1: VC709 Evaluation Board Features
X-Ref Target - Figure 1-16
20%
4.7UH
3.0A
VCC3V3
1
2
L6
L7
1 20% 2
4.7UH
C114 C23
3.0A
1 1
22UF 0.1UF
25V 25V
2 2
X5R X5R
SFP1_IIC_SDA
SFP1_IIC_SSCL
SFP1_TX_FAULT_LS
SFP1_TX_DISABLE_LS
SFP1_MOD_DETECT_LS
SFP1_RS0_LS
SFP1_RS1_LS
SFP1_LOS_LS
Figure 1-16: SFP+ Module Connector Circuit (Typical at Four Locations)
Table 1-13
Table 1-13: FPGA U1 to SFP+ Module Connections
SFP+ Module 1 (P3)
SFP+ Module 2 (P2)
40
74754-0101
CG1
74441-0010
SFP1_VCCR 15
VCCR
SFP1_VCCT
16
VCCT
10
VEER_1
11
VEER_2
14
VEER_3
C115 C22
1 1
22UF 0.1UF
1
VEET_1
25V 25V
17
2 2
VEET_2
X5R X5R
20
VEET_3
21
GND1
22
GND2
GND 23
GND3
24
GND4
25
GND5
26
GND6
27
GND7
28
GND8
29
GND9
30
GND10
31
GND11
32
GND12
P3
IIC Address = 0B1010000 (0x50)
GND
VCC3V3
C98
1
0.1UF
25V
2
X5R
GND
TXS0108E
2
VCCR
1
A1
3
A2
4
A3
5
A4
6
A5
7
A6
NC
8
A7
NC
9
A8
10
OK
U2
TSSOP_20
lists the SFP+ module RX and TX connections to the FPGA.
XCVX690T (U1) Pin
AP4
AP3
AN6
AN5
AN2
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VCC3V3
12_SFP1_RX_N
RD_N
13_SFP1_RX_P
R11
RD_P
1
4.7K
18_SFP1_TX_P
1/10W
2
TD_P
19_SFP1_TX_N
5%
TD_N
2
TX_FAULT
3
TX_DISABLE
4
SDR
5
SCD
6
MOD_ABS
7
RS0
8
RS1
9
LOG
VCC3V3
C100
1
0.1UF
25V
2
X5R
GND
19
VCCB
SFP1_TX_FAULT
20
B1
SFP1_TX_DISABLE
18
B2
SFP1_MOD_DETECT
17
B3
16 SFP1_RS0
B4
SFP1_RS1
15
B5
SFP1_LOS
14
B6
NC
13
B7
NC
12
B8
11
GND
GND
Net Name
Pin Number
SFP1_TX_P
SFP1_TX_N
SFP1_RX_P
SFP1_RX_N
SFP2_TX_P
R11 R11 R11 R11
1 1 1 1
4.7K 4.7K 4.7K 4.7K
1/10W 1/10W 1/10W 1/10W
2 2 2 2
5% 5% 5% 5%
UG887_C1_15_012113
SFP+ Module
Pin Name
18 TX_P
19 TX_N
13 RD_P
12 RD_N
18 TX_P
VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014
R11
1
4.7K
1/10W
2
5%