Xilinx VC709 User Manual page 52

For the virtex-7 fpga
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Chapter 1: VC709 Evaluation Board Features
The FMC1 HPC signals are distributed across GTH Quads 117, 118, and 119.
The VC709 board VADJ voltage for the FMC1 HPC (J35) connector is fixed at 1.8V.
Signaling speed ratings:
Mechanical specifications:
The Samtec connector system is rated for signaling speeds up to 9 GHz (18 Gb/s) based on
a –3 dB insertion loss point within a two-level signaling environment.
Table 1-20
Table 1-20: VITA 57.1 FMC HPC J35 Connections to FPGA U1
J35 FMC
Schematic Net Name
HPC Pin
A2
FMC1_HPC_DP1_M2C_P
A3
FMC1_HPC_DP1_M2C_N
A6
FMC1_HPC_DP2_M2C_P
A7
FMC1_HPC_DP2_M2C_N
A10
FMC1_HPC_DP3_M2C_P
A11
FMC1_HPC_DP3_M2C_N
A14
FMC1_HPC_DP4_M2C_P
A15
FMC1_HPC_DP4_M2C_N
A18
FMC1_HPC_DP5_M2C_P
A19
FMC1_HPC_DP5_M2C_N
A22
FMC1_HPC_DP1_C2M_P
A23
FMC1_HPC_DP1_C2M_N
A26
FMC1_HPC_DP2_C2M_P
A27
FMC1_HPC_DP2_C2M_N
A30
FMC1_HPC_DP3_C2M_P
A31
FMC1_HPC_DP3_C2M_N
A34
FMC1_HPC_DP4_C2M_P
52
10 GTH transceivers
2 GTH clocks
2 differential clocks
Single-ended: 9 GHz (18 Gb/s)
Differential
Optimal vertical: 9 GHz (18 Gb/s)
Optimal horizontal: 16 GHz (32 Gb/s)
High Density Vertical: 7 GHz (15 Gb/s)
Samtec SEAM/SEAF Series
1.27 mm x 1.27 mm (0.050-inch x 0.050-inch) pitch
shows the FMC HPC connector J35 connections to FPGA U1.
U1 FPGA Pin
C6
C5
B8
B7
A6
A5
H8
H7
G6
G5
D4
D3
C2
C1
B4
B3
J2
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J64 FMC
Schematic Net Name
HPC Pin
B1
B4
FMC1_HPC_DP9_M2C_P
B5
FMC1_HPC_DP9_M2C_N
B8
FMC1_HPC_DP8_M2C_P
B9
FMC1_HPC_DP8_M2C_N
B12
FMC1_HPC_DP7_M2C_P
B13
FMC1_HPC_DP7_M2C_N
B16
FMC1_HPC_DP6_M2C_P
B17
FMC1_HPC_DP6_M2C_N
B20
FMC1_HPC_GBTCLK1_M2C_P
B21
FMC1_HPC_GBTCLK1_M2C_N
B24
FMC1_HPC_DP9_C2M_P
B25
FMC1_HPC_DP9_C2M_N
B28
FMC1_HPC_DP8_C2M_P
B29
FMC1_HPC_DP8_C2M_N
B32
FMC1_HPC_DP7_C2M_P
B33
FMC1_HPC_DP7_C2M_N
U1 FPGA
Pin
NC
NA
N6
N5
P8
P7
E6
E5
F8
F7
E10
E9
M4
M3
N2
N1
F4
F3
VC709 Evaluation Board
UG887 (v1.2.1) March 11, 2014

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