Motorola MC68020 User Manual page 12

9/29/95
LIST OF ILLUSTRATIONS (Continued)
Figure
Number
7-4 Coprocessor Address Map in MC68020/EC020 CPU Space .......................... 7-7
7-5 Coprocessor Interface Register Set Map ......................................................... 7-7
7-6 Coprocessor General Instruction Format (cpGEN) .......................................... 7-8
7-7 Coprocessor Interface Protocol for General Category Instructions.................. 7-10
7-8 Coprocessor Interface Protocol for Conditional Category Instructions ............ 7-11
7-9 Branch on Coprocessor Condition Instruction Format (cpBcc.W) ................... 7-12
7-10 Branch on Coprocessor Condition Instruction Format (cpBcc.L) ..................... 7-12
7-11 Set on Coprocessor Condition Instruction Format (cpScc) .............................. 7-13
7-12 Test Coprocessor Condition, Decrement, and Branch
Instruction Format (cpDBcc)........................................................................... 7-14
7-13 Trap on Coprocessor Condition Instruction Format (cpTRAPcc) ..................... 7-15
7-14 Coprocessor State Frame Format in Memory .................................................. 7-17
7-15 Coprocessor Context Save Instruction Format (cpSAVE) ............................... 7-20
7-16 Coprocessor Context Save Instruction Protocol .............................................. 7-21
7-17 Coprocessor Context Restore Instruction Format (cpRESTORE) ................... 7-22
7-18 Coprocessor Context Restore Instruction Protocol .......................................... 7-23
7-19 Control CIR Format .......................................................................................... 7-25
7-20 Condition CIR Format ...................................................................................... 7-26
7-21 Operand Alignment for Operand CIR Accesses .............................................. 7-26
7-22 Coprocessor Response Primitive Format ........................................................ 7-28
7-23 Busy Primitive Format ...................................................................................... 7-30
7-24 Null Primitive Format........................................................................................ 7-31
7-25 Supervisor Check Primitive Format.................................................................. 7-33
7-26 Transfer Operation Word Primitive Format ...................................................... 7-33
7-27 Transfer from Instruction Stream Primitive Format .......................................... 7-34
7-28 Evaluate and Transfer Effective Address Primitive Format.............................. 7-35
7-29 Evaluate Effective Address and Transfer Data Primitive Format ..................... 7-35
7-30 Write to Previously Evaluated Effective Address Primitive Format .................. 7-37
7-31 Take Address and Transfer Data Primitive Format .......................................... 7-39
7-32 Transfer to/from Top of Stack Primitive Format ............................................... 7-40
7-33 Transfer Single Main Processor Register Primitive Format ............................. 7-40
7-34 Transfer Main Processor Control Register Primitive Format ........................... 7-41
7-35 Transfer Multiple Main Processor Registers Primitive Format ......................... 7-42
7-36 Register Select Mask Format ........................................................................... 7-42
7-37 Transfer Multiple Coprocessor Registers Primitive Format.............................. 7-43
7-38 Operand Format in Memory for Transfer to -(An) ........................................... 7-44
7-39 Transfer Status Register and ScanPC Primitive Format.................................. 7-44
7-40 Take Preinstruction Exception Primitive Format .............................................. 7-45
7-41 MC68020/EC020 Preinstruction Stack Frame ................................................. 7-46
7-42 Take Midinstruction Exception Primitive Format .............................................. 7-47
7-43 MC68020/EC020 Midinstruction Stack Frame ................................................. 7-47
7-44 Take Postinstruction Exception Primitive Format............................................. 7-48
xvi
SECTION 1: OVERVIEW
Title
M68020 USER'S MANUAL
UM Rev.1.0
Page
Number
MOTOROLA