Mc68020/Ec020 Byte Select Pal Equations - Motorola MC68020 User Manual

PAL16L8
BYTE_SELECT
MC68020/EC020 BYTE DATA SELECT GENERATION FOR 32-BIT PORTS, MAPPED AND UNMAPPED.
MOTOROLA INC., AUSTIN, TEXAS
INPUTS: A0 A1
OUTPUTS: ~UUDA
!~UUDA = RW
+!A0 *!A1
!~UMDA = RW
+A0 *!A1
+!A1 *!SIZ0
+!A1 *SIZ1
!~LMDA = RW
;directly addressed, any size
+!A1 *!SIZ0 *!SIZ1
+!A1 *SIZ0 *SIZ1
+!A1 *A0 *!SIZ0
!~LLDA = RW
+A0 *A1
+A0 *SIZ0 *SIZ1
+!SIZ0 *!SIZ1
+A1 *SIZ1
!~UUDB = RW *!~CPU * (addressb)
+!A0 *!A1 *!~CPU * (addressb)
!~UMDB = RW *!~CPU * (addressb)
+ A0 *!A1 *!~CPU * (addressb)
+!A1 *!SIZ0 *!~CPU * (addressb)
+!A1 *SIZ1 *!~CPU * (addressb)
!~LMDB =RW *!~CPU * (addressb)
+!A0 * A1 *!~CPU * (addressb)
+!A1 *!SIZ0 *!SIZ1 *!~CPU * (addressb)
+!A1 * SIZ0 * SIZ1 *!~CPU * (addressb)
+!A1 * A0 *!SIZ0 *!~CPU * (addressb)
!~LLDB =RW *!~CPU * (addressb)
+A0 * A1 *!~CPU * (addressb)
+ A0 * SIZ0 * SIZ1 *!~CPU * (addressb)
+!SIZ0 *!SIZ1 *!~CPU * (addressb)
+A1 * SIZ1 *!~CPU * (addressb)
DESCRIPTION : Byte select signals for writing. On reads, all byte selects are asserted if the respective memory block is addressed.
The input signal CPU prevents byte select assertion during CPU space cycles and is derived from NANDing FC1–FC0 or FC2–FC0.
The label (addressb) is a designer-selectable combination of address lines used to generate the proper address decode for the
system's memory bank. With the address lines given here, the decode block size is 256 Kbytes to 2 Mbytes. A similar address might
be included in the equations for UUDA , UMDA , etc. if the designer wishes them to be memory mapped also.
Figure 9-6. MC68020/EC020 Byte Select PAL Equations
9-8
SIZ0 SIZ1 RW
~UMDA ~LMDA
M68020 USER'S MANUAL
A18 A19 A20
~LLDA ~UUDA ~UMDB
;enable upper byte on read of 32-bit port
;directly addressed, any size
;enable upper middle byte on read of 32-bit port
;directly addressed, any size
;even word aligned, size word or long word
;even word aligned, size is word or three byte
;enable lower middle byte on read of 32-bit port
;even word aligned, size is long word
;even word aligned, size is three byte
;even word aligned, size is word or long word
;enable lower byte on read of 32-bit port
;directly addressed, any size
;odd byte alignment, three byte size
;size is long word, any address
;odd word aligned, word or three byte size
;enable upper byte on read of 32-bit port
;directly addressed, any size
;enable upper middle byte on read of 32-bit port
;directly addressed, any size
;even word aligned, size word or long word
;even word aligned, size is word or three byte
;enable lower middle byte on read of 32-bit port
;directly addressed, any size
;even word aligned, size is long word
;even word aligned, size is three byte
;even word aligned, size is word or long word
;enable lower byte on read of 32-bit port
;directly addressed, any size
;odd byte alignment, three byte size
;size is long word, any address
;odd word aligned, word or three byte size
A21 ~CPU
~LMDB ~LLDB
+!A0 *A1
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