Register Direct
Data
Address
Register Indirect
Address
Address with Postincrement
Address with Predecrement
Address with Displacement
Address Register Indirect with Index
8-Bit Displacement
Base Displacement
Memory Indirect
Postindexed
Preindexed
PC Indirect with Displacement
PC Indirect with Index
8-Bit Displacement
Base Displacement
PC Indirect
Postindexed
Preindexed
Absolute Data Addressing
Short
Long
Immediate
NOTE:
Dn
An =
d
, d
8
16
Xn =
bd =
od =
PC
<data> =
( ) =
[ ]
MOTOROLA
Table 1-1. Addressing Modes
Addressing Modes
=
Data Register, D7–D0
Address Register, A7–A0
=
A twos complement or sign-extended displacement added as part
of the effective address calculation; size is 8 (d
when omitted, assemblers use a value of zero.
Address or data register used as an index register; form is
Xn.SIZE
SCALE, where SIZE is .W or .L (indicates index register
*
size) and SCALE is 1, 2, 4, or 8 (index register is multiplied by
SCALE); use of SIZE and/or SCALE is optional.
A twos-complement base displacement; when present, size can be
16 or 32 bits.
Outer displacement added as part of effective address calculation
after any memory indirection; use is optional with a size of 16 or 32
bits.
=
Program Counter
Immediate value of 8, 16, or 32 bits
Effective Address
=
Use as indirect access to long-word address.
M68020 USER'S MANUAL
Syntax
Dn
An
(An)
(An)+
–(An)
(d
, An)
16
(d
, An, Xn)
8
(bd, An, Xn)
([bd, An], Xn, od)
([bd, An, Xn], od)
(d
, PC)
16
(d
, PC, Xn)
8
(bd, PC, Xn)
([bd, PC], Xn, od)
([bd, PC, Xn], od)
(xxx).W
(xxx).L
#<data >
) or 16 (d
) bits;
8
16
1- 9