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2.3 Pin I/O Circuits and Recommended Connection of Unused Pins
The I/O circuit type of each pin and recommended connection of unused pins are shown in Table 2-1.
For the I/O circuit configuration of each type, see Figure 2-1.
Pin Name
Note 1
P00/KR0 to P07/KR7
Note 2
P00/KR00 to P07/KR07
P10, P11
P20/SCK20/ASCK20
P21/SO20/TxD20
P22/SI20/RxD20
P23/SCK10
P24/SO10
P25/SI10
P30/INTP0/TO50/
TMI60
P31/INTP1/TO60
P32/INTP2/TO61/
TMI61
P33/INTP3/CPT20/
TO20
Note 1
P34
Note 2
P34/RIN
P50 to P53
(mask ROM version)
P50 to P53
(flash memory version)
Note 1
P60/ANI0 to P67/ANI7
P60/ANI0/KR10 to
Note 2
P67/ANI7/KR17
Note 3
P70 to P73
Note 3
P80 to P87
COM0 to COM3
S0 to S15
Note 4
S16 to S19
Note 4
S20 to S27
CAPH, CAPL
V
to V
LC0
LC2
AV
DD
AV
SS
µ
Notes 1. When
PD789488, 78F9488 is used.
µ
2. When
PD789489, 78F9489 is used.
3. Only when port pin is selected by mask option or port function register.
4. Only when segment output pin is selected by mask option or port function register.
CHAPTER 2 PIN FUNCTIONS
Table 2-1. Types of Pin I/O Circuits (1/2)
I/O Circuit Type
I/O
8-A
I/O
Input:
Output:
5-A
8-A
5-A
8-A
5-A
8-A
Input:
Output:
13-W
Input:
Output:
13-V
9-C
Input
Connect to V
2-H
5-K
I/O
Input:
Output:
18
Output
Leave open.
17
–
–
Connect directly to V
Connect directly to V
User's Manual U15331EJ4V1UD
Recommended Connection of Unused Pins
Independently connect to V
or V
DD
Leave open.
Independently connect to V
via a resistor.
SS
Leave open.
Independently connect to V
via a resistor.
DD
Leave open.
or V
.
DD
SS
Independently connect to V
or V
DD
Leave open.
DD
SS
via a resistor.
SS
via a resistor.
SS
45
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