NEC PD789488 User Manual page 189

Pd789489 subseries 8-bit single-chip microcontrollers
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(1)
Transmit shift register 20 (TXS20)
TXS20 is a register in which transmit data is prepared. The transmit data is output from TXS20 bit-serially.
When the data length is seven bits, bits 0 to 6 of the data in TXS20 will be transmit data. Writing data to
TXS20 triggers transmission.
TXS20 can be written with an 8-bit memory manipulation instruction, but cannot be read.
RESET input sets TXS20 to FFH.
Caution Do not write to TXS20 during transmission.
TXS20 and receive buffer register 20 (RXB20) are mapped at the same address, so any
attempt to read from TXS20 results in a value being read from RXB20.
(2)
Receive shift register 20 (RXS20)
RXS20 is a register in which serial data, received at the RxD20 pin, is converted to parallel data. Once one
entire byte has been received, RXS20 feeds the receive data to receive buffer register 20 (RXB20).
RXS20 cannot be manipulated directly by a program.
(3)
Receive buffer register 20 (RXB20)
RXB20 holds receive data. New receive data is transferred from receive shift register 20 (RXS20) at every 1-
byte data reception.
When the data length is seven bits, the receive data is sent to bits 0 to 6 of RXB20, in which the MSB is
always fixed to 0.
RXB20 can be read with an 8-bit memory manipulation instruction, but cannot be written.
RESET input makes RXB20 undefined.
Caution RXB20 and transmit shift register 20 (TXS20) are mapped at the same address, so any
attempt to write to RXB20 results in a value being written to TXS20.
(4)
Transmit controller
The transmit controller controls transmission. For example, it adds start, parity, and stop bits to the data in
transmit shift register 20 (TXS20), according to the setting of asynchronous serial interface mode register 20
(ASIM20).
(5)
Receive controller
The receive controller controls reception according to the setting of asynchronous serial interface mode
register 20 (ASIM20). It also checks for errors, such as parity errors, during reception. If an error is detected,
asynchronous serial interface status register 20 (ASIS20) is set according to the status of the error.
CHAPTER 11 SERIAL INTERFACE 20
User's Manual U15331EJ4V1UD
189

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