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Symbol
<7>
6
TMC60
TCE60
0
TCE60
0
Clear TM60 count value and stop operation (the count value is also cleared for TM50 in cascade connection
mode)
1
Start count operation (the count operation is also started for TM50 in cascade connection mode)
TCL602
TCL601
0
0
0
0
0
1
0
1
1
0
1
0
Other than above
TMD501
TMD500
×
0
0
1
0
0
×
0
Other than above
TOE600
0
Output disabled
1
Output enabled
Notes 1. Since the count operation is controlled by TCE60 (bit 7 of TMC60) in cascade connection mode,
any setting for TCE50 is ignored.
2. The operation mode selection is set by a combination of the TMC50 and TMC60 registers.
Caution To manipulate TMC60, follow the setting procedure below.
<1>
Set the TM60 count operation to stop.
<2>
Set the operation mode and count clock.
<3>
The count operation starts.
Remarks 1. f
:
X
2. f
: External input clock frequency
TMI
3. The parenthesized values apply to operation at f
4. ×:
130
CHAPTER 7 8-BIT TIMERS 50, 60, AND 61
Figure 7-7. Format of 8-Bit Timer Mode Control Register 60
5
4
3
TCL602
TCL601
TCL600
Control of TM60 count operation
TCL600
0
f
(5.0 MHz)
X
2
f
/2
(1.25 MHz)
1
X
0
f
TMI
1
f
/2
TMI
2
f
/2
0
TMI
3
1
f
/2
TMI
Setting prohibited
TMD601
TMD600
0
0
Stand-alone mode (8-bit counter mode)
0
1
16-bit counter mode (cascade connection mode)
1
1
Carrier generator mode
1
0
PPG output mode
Setting prohibited
Main system clock oscillation frequency
don't care
User's Manual U15331EJ4V1UD
2
1
<0>
TMD601
TMD600
TOE600
Note 1
Selection of timer 60 count clock
Selection of operation mode for timer 60
Control of timer output
= 5.0 MHz.
X
Address
After reset
R/W
FF4EH
00H
R/W
Note 2
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