Control Registers For 8-Bit Timers 50, 60, And 61; Format Of 8-Bit Timer Mode Control Register 50 - NEC PD789488 User Manual

7.3 Control Registers for 8-Bit Timers 50, 60, and 61

8-bit timers 50, 60, and 61 are controlled by the following six registers.
• 8-bit timer mode control register 50 (TMC50)
• 8-bit timer mode control register 60 (TMC60)
• Carrier generator output control register 60 (TCA60)
• 8-bit timer mode control register 61 (TMC61)
• Port mode register 3 (PM3)
• Port 3
(1) 8-bit timer mode control register 50 (TMC50)
8-bit timer mode control register 50 (TMC50) is used to control the timer 50 count clock setting and the
operation mode setting.
TMC50 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets this register to 00H.
Figure 7-6. Format of 8-Bit Timer Mode Control Register 50 (1/2)
Symbol <7> <6>
TMC50 TCE50 TEG50
TCE50
0 Clear TM50 count value and stop operation
1 Start count operation
TEG50
0 Count at the rising edge of the count clock
1 Count at both edges of the count clock
TCL502 TCL501
0 0
0 0
0 1
0 1
1 0
1 0
Other than above
TMD501 TMD500
0 0
0 1
0 0
1 0
Other than above
128
CHAPTER 7 8-BIT TIMERS 50, 60, AND 61
5 4 3
TCL502 TCL501 TCL500
Control of TM50 count operation
Selection of valid edge of TM50 count clock
Note 2
TCL500
0 f (5.0 MHz)
X
3
1 f /2 (625 kHz)
X
7
0 f /2 (39.1 kHz)
X
1 f (32.768 kHz)
XT
0 Timer 60 match signal (INTTM60)
1 Carrier clock (in carrier generator mode) or timer 60 output signal (in other than carrier
generator mode)
Setting prohibited
TMD601 TMD600
× 0 Stand-alone mode (8-bit counter mode)
0 1 16-bit counter mode (cascade connection mode)
1 1 Carrier generator mode
×
0 PWM output mode
Setting prohibited
User's Manual U15331EJ4V1UD
2 1 <0>
TMD501 TMD500 TOE50
Note 1
Selection of timer 50 count clock
Selection of operation mode for timer 50
Address After reset R/W
FF4DH 00H R/W
Note 3