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Figure No.
5-5
Format of Subclock Control Register............................................................................................................99
5-6
Subclock Selection Register Format ..........................................................................................................100
5-7
External Circuit of Main System Clock Oscillator........................................................................................101
5-8
External Circuit of Subsystem Clock Oscillator...........................................................................................102
5-9
Examples of Incorrect Resonator Connection ............................................................................................103
5-10
Switching Between System Clock and CPU Clock .....................................................................................107
6-1
Block Diagram of 16-Bit Timer 20 ..............................................................................................................109
6-2
Format of 16-Bit Timer Mode Control Register 20......................................................................................111
6-3
Format of Port Mode Register 3 .................................................................................................................112
6-4
Settings of 16-Bit Timer Mode Control Register 20 for Timer Interrupt Operation......................................113
6-5
Timing of Timer Interrupt Operation ...........................................................................................................114
6-6
Settings of 16-Bit Timer Mode Control Register 20 for Timer Output Operation ........................................115
6-7
Timer Output Timing ..................................................................................................................................115
6-8
Settings of 16-Bit Timer Mode Control Register 20 for Capture Operation.................................................116
6-9
Capture Operation Timing (with Both Edges of CPT20 Pin Specified) .......................................................116
6-10
16-Bit Timer Counter 20 Readout Timing...................................................................................................117
7-1
Block Diagram of 24-Bit Event Counter......................................................................................................121
7-2
Block Diagram of Timer 50.........................................................................................................................123
7-3
Block Diagram of Timer 60.........................................................................................................................124
7-4
Block Diagram of Timer 61.........................................................................................................................125
7-5
Block Diagram of Output Controller (Timer 60) ..........................................................................................126
7-6
Format of 8-Bit Timer Mode Control Register 50 .......................................................................................128
7-7
Format of 8-Bit Timer Mode Control Register 60........................................................................................130
7-8
Format of Carrier Generator Output Control Register 60 ...........................................................................131
7-9
Format of 8-Bit Timer Mode Control Register 61........................................................................................132
7-10
Format of Port Mode Register 3 .................................................................................................................133
7-11
7-12
Timing of Interval Timer Operation with 8-Bit Resolution (When CRnm Is Set to 00H) ..............................136
7-13
Timing of Interval Timer Operation with 8-Bit Resolution (When CRnm Is Set to FFH)..............................137
7-14
Timing of Interval Timer Operation with 8-Bit Resolution (When CRnm Changes from N to M (N < M)) ....137
Timing of Interval Timer Operation with 8-Bit Resolution (When CRnm Changes from N to M (N > M)) ....138
7-15
7-16
Timing of Interval Timer Operation with 8-Bit Resolution (When Timer 60 Match Signal Is Selected
for Timer 50 Count Clock) ..........................................................................................................................139
7-17
Timing of Operation of External Event Counter with 8-Bit Resolution ........................................................140
7-18
Timing of Square-Wave Output with 8-Bit Resolution ................................................................................142
7-19
Timing of Interval Timer Operation with 16-Bit Resolution .........................................................................145
7-20
Timing of External Event Counter Operation with 16-Bit Resolution ..........................................................147
18
LIST OF FIGURES (2/6)
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User's Manual U15331EJ4V1UD
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