10-Bit A/D Converter Operation; Basic Operation Of 10-Bit A/D Converter - NEC PD789488 User Manual

10.4 10-Bit A/D Converter Operation

10.4.1 Basic operation of 10-bit A/D converter

<1> Bit 0 of A/D converter mode register 0 (ADML0) is set (ADCE0 = 1).
<2> Select a channel for A/D conversion, using analog input channel specification register 0 (ADS0).
µ
<3> When 14 s or more have elapsed after ADCE0 was set, set bit 7 of ADML0 (ADCS0 = 1). The voltage
supplied to the selected analog input channel is sampled using the sample & hold circuit.
<4> After sampling continues for a certain period of time, the sample & hold circuit is put on hold to keep the
input analog voltage until A/D conversion is completed.
<5> Bit 9 of the successive approximation register (SAR) is set. The series resistor string tap voltage at the
tap selector is set to half of AV
<6> The series resistor string tap voltage is compared with the analog input voltage using the voltage
comparator. If the analog input voltage is higher than half of AV
lower than half of AV
<7> Bit 8 of SAR is set automatically, and comparison shifts to the next stage. The next tap voltage of the
series resistor string is selected according to bit 9, which reflects the previous comparison result, as
follows:
• Bit 9 = 1: Three quarters of AV
• Bit 9 = 0: One quarter of AV
The tap voltage is compared with the analog input voltage. Bit 8 is set or reset according to the result of
comparison.
• Analog input voltage ≥ tap voltage: Bit 8 = 1
• Analog input voltage < tap voltage: Bit 8 = 0
<8> Comparison is repeated until bit 0 of SAR is reached.
<9> When comparison is completed for all of the 10 bits, a significant digital result is left in SAR. This value is
sent to and latched in A/D conversion result register 0 (ADCRL0). At the same time, it is possible to
generate an A/D conversion end interrupt request (INTAD0).
Cautions 1. Start conversion (ADCS0 = 1) after 14
If ADCE0 is not used, the conversion result immediately after the setting of bit 7 (ADCS0)
is undefined.
2. In standby mode, A/D converter operation is stopped.
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CHAPTER 10 10-BIT A/D CONVERTER
.
DD
, the MSB is reset.
DD
DD
DD
User's Manual U15331EJ4V1UD
, the MSB of SAR is left set. If it is
DD
µ
s have elapsed following the setting of ADCE0.