NEC PD789488 User Manual page 238

Pd789489 subseries 8-bit single-chip microcontrollers
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In 6-byte transmission/reception (bit 6 (ARLD0) and bit 7 (RE0) of automatic data transmit/receive control
register 0 (ADTC0) = 0, and 1, respectively) in basic transmit/receive mode, buffer RAM operates as follows.
(i) Before transmission/reception (refer to Figure 12-9 (a))
After any data has been written to SIO1A0 (start trigger: this data is not transferred), transmit data 1
(T1) is transferred from the buffer RAM to SIO1A0. When transmission of the first byte is completed,
receive data 1 (R1) is transferred from SIO1A0 to the buffer RAM, and automatic data
transmit/receive address pointer 0 (ADTP0) is decremented.
transferred from the buffer RAM to SIO1A0.
(ii) 4th byte transmit/receive point (refer to Figure 12-9 (b))
Transmission/reception of the third byte is completed, and transmit data 4 (T4) is transferred from
the buffer RAM to SIO1A0. When transmission of the fourth byte is completed, receive data 4 (R4)
is transferred from SIO1A0 to the buffer RAM, and ADTP0 is decremented.
(iii) Completion of transmission/reception (refer to Figure 12-9 (c))
When transmission of the sixth byte is completed, receive data 6 (R6) is transferred from SIO1A0 to
the buffer RAM, and the interrupt request flag (CSIIF10) is set (INTCSI10 generation).
Figure 12-9. Buffer RAM Operation in 6-Byte Transmission/Reception
FFAFH
Transmit data 1 (T1)
FFA5H
Transmit data 2 (T2)
Transmit data 3 (T3)
Transmit data 4 (T4)
Transmit data 5 (T5)
Transmit data 6 (T6)
FFA0H
238
CHAPTER 12 SERIAL INTERFACE 1A0
(in Basic Transmit/Receive Mode) (1/2)
(a) Before transmission/reception
User's Manual U15331EJ4V1UD
Then transmit data 2 (T2) is
Receive data 1 (R1)
SIO1A0
5
ADTP0
_ 1
0
CSIIF10

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