Block Diagram Of Timer 60 - NEC PD789488 User Manual

Pd789489 subseries 8-bit single-chip microcontrollers
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8-bit timer mode control
register 60 (TMC60)
TCE60 TCL602 TCL601 TCL600 TMD601 TMD600 TOE600
f
X
2
f
/2
X
f
TMI
TMI60/TO50/
INTP0/P30
f
/2
TMI
2
f
/2
TMI
3
f
/2
TMI
To Figure 7-2(D)
Count operation start
signal to timer 50
(in cascade connection mode)
Figure 7-3. Block Diagram of Timer 60
Internal bus
8-bit H width compare
Decoder
8-bit timer counter 60
(TM60)
Clear
PPG mode
Cascade connection mode
(D)
Carrier generator output
control register 60 (TCA60)
8-bit compare
register 60
register 60 (CR60)
(CRH60)
Selector
F/F
Match
OVF
Reset
(E)
To Figure 7-2(E)
Timer counter match
signal for TM60
(in cascade connection mode)
(F)
From Figure 7-2(F)
TM50 match signal
(in cascade connection mode)
RMC60 NRZB60 NRZ60
(G)
Timer counter match signal
from timer 50 in Figure 7-2(G)
(in carrier generator mode)
Output
TO60/INTP1/P31
Note
controller
(C)
To Figure 7-2(C) carrier clock
To Figure 7-2(A)
(A)
Bit 7 of TM60
(in cascade connection mode)
INTTM60
To Figure 7-2(B)
(B)
Timer 60 interrupt request signal
count clock signal
input to TM50

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