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Figure No.
11-4
Format of Asynchronous Serial Interface Mode Register 20 ......................................................................191
11-5
Format of Asynchronous Serial Interface Status Register 20 .....................................................................193
11-6
Format of Baud Rate Generator Control Register 20 .................................................................................194
11-7
Format of Asynchronous Serial Interface Transmit/Receive Data ..............................................................204
11-8
Asynchronous Serial Interface Transmission Completion Interrupt Timing ................................................206
11-9
Asynchronous Serial Interface Reception Completion Interrupt Timing .....................................................207
11-10
Receive Error Timing..................................................................................................................................208
11-11
3-Wire Serial I/O Mode Timing ...................................................................................................................214
12-1
Block Diagram of Serial Interface 1A0........................................................................................................217
12-2
Format of Serial Operation Mode Register 1A0 .........................................................................................220
12-3
Format of Automatic Data Transmit/Receive Control Register 0................................................................221
12-4
Format of Automatic Data Transmit/Receive Interval Specification Register 0 ..........................................222
12-5
3-Wire Serial I/O Mode Timing ...................................................................................................................227
12-6
Circuit of Switching in Transfer Bit Order ...................................................................................................229
12-7
Basic Transmit/Receive Mode Operation Timing .......................................................................................236
12-8
Basic Transmit/Receive Mode Flowchart ...................................................................................................237
12-9
Buffer RAM Operation in 6-Byte Transmission/Reception (in Basic Transmit/Receive Mode) ..................238
12-10
Basic Transmit Mode Operation Timing .....................................................................................................240
12-11
Basic Transmit Mode Flowchart .................................................................................................................241
12-12
Buffer RAM Operation in 6-Byte Transmission (in Basic Transmit Mode) ..................................................242
12-13
Repeat Transmit Mode Operation Timing ..................................................................................................244
12-14
Repeat Transmit Mode Flowchart ..............................................................................................................245
12-15
Buffer RAM Operation in 6-Byte Transmission (in Repeat Transmit Mode) ...............................................246
12-16
Automatic Transmission/Reception Suspension and Restart .....................................................................248
12-17
Interval Time of Automatic Transmission/Reception ..................................................................................249
13-1
Correspondence with LCD Display RAM....................................................................................................251
13-2
LCD Controller/Driver Block Diagram.........................................................................................................252
13-3
Format of LCD Display Mode Register 0....................................................................................................254
13-4
Format of LCD Clock Control Register 0 ....................................................................................................255
13-5
Format of LCD Voltage Boost Control Register 0.......................................................................................256
13-6
Relationship Between LCD Display Data Memory Contents and Segment/Common Outputs
(When Using S16 to S27)...........................................................................................................................257
13-7
Common Signal Waveforms.......................................................................................................................259
13-8
Voltages and Phases of Common and Segment Signals ...........................................................................259
13-9
Three-Time-Slice LCD Display Pattern and Electrode Connections...........................................................260
13-10
Example of Connecting Three-Time-Slice LCD Panel................................................................................261
13-11
Three-Time-Slice LCD Drive Waveform Examples (1/3 Bias Method) .......................................................262
20
LIST OF FIGURES (4/6)
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User's Manual U15331EJ4V1UD
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